Blackfin as JTAG programmer? 2011-03-07

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2011-03-07 15:45:07     Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98688   

 

Do any applications exist that allow the blackfin to be a JTAG programmer? Our hardware has other devices on the JTAG bus, and ideally, we would be able to use the blackfin to program those devices remotely. I'm just curious if this has been done before or if some application exists already.

 

Sorry if this has been discussed somewhere before, but I couldn't find anything about it.

 

Thanks,

 

Ben

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2011-03-07 16:06:26     Blackfin as JTAG programmer?

Wojtek Skulski (UNITED STATES)

Message: 98689    Ben:

 

1) There is some FPGA-related code in the u-Boot tree.

 

2) There is some FPGA-related code in the Linux "user" directory under

Analog Devices example applications.

 

3) You may find some Xilinx app notes to be useful.

XAPP058 - Xilinx In-System Programming Using an Embedded Microcontroller

XAPP500 - J Drive: In-System Programming of IEEE Standard 1532 Devices

XAPP503 - SVF and XSVF File Formats for Xilinx Devices

 

There are more Xilinx app notes touching on this subject. Visit their

reference area for details.

  www.xilinx.com/support/documentation/andeviceconfigprogram_embedinsystconfig.htm

 

Hope it helps -- Wojtek

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2011-03-07 16:06:35     Re: Blackfin as JTAG programmer?

Kolja Waschk (GERMANY)

Message: 98690   

 

Hi,

 

I think the ICE-100B JTAG Emulator itself is based on a Blackfin processor, but its firmware is AFAIK not available to the public.

 

It is not too complicated to enhance UrJTAG, the project behind "bfin-*-jtag", to talk to other JTAG devices via GPIO, SPI or SPORT and it probably can be compiled to run on blackfin-uClinux. Actually, I'm not sure if bfin-gdbproxy plus bfin-jtag can run on uClinux, but I guess so.

 

What is the particular application you're thinking of? The feasibility depends on the tools you want to use on the host side (unless the Blackfin is the host itself) and the targets. For example, UrJTAG aka bfin-jtag supports various targets but isn't the fastest solution, generally. A uClinux base system with bfin-gdbproxy running on a Blackfin makes a JTAG programmer good enough to be used for debugging another Blackfin with GDB, but is useless for VDSP++ AFAIK.

 

Kolja

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2011-03-07 16:29:58     Re: Blackfin as JTAG programmer?

Mike Frysinger (UNITED STATES)

Message: 98691   

 

the firmware running in any of the ADI ICEs is not available to anyone outside of ADI, and i dont think i'll be able to persuade anyone otherwise

 

urjtag already has a GPIO cable driver that should work on Blackfin systems via the gpiolib sysfs interface

 

from time to time i actually build up urjtag for the Blackfin target to make sure it works.  atm it seems to be broken, but i'll commit a few fixes to address that.

 

gdbproxy ive never bothered to do though ... it will def need a little tweaking, but shouldnt be too hard.

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2011-03-07 19:52:00     Re: Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98693   

 

Thanks for the replies everyone.

 

The Xilinx app notes are helpful for getting oriented.

 

Our goal is just to be able to program an FPGA and/or CPLD remotely via the blackfin host. The JTAG bus lines for the FPGA and CPLD are connected to blackfin GPIO, so it sounds like urjtag will be helpful. I'll dig into that and see how it goes.

 

Thank you!

 

-Ben

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2011-03-07 22:39:01     Re: Blackfin as JTAG programmer?

Mike Frysinger (UNITED STATES)

Message: 98697   

 

current svn trunk should build once you disable the bfin command (a bit ironic i know).  edit include/urjtag/bfin.h and delete the core_regnum enum.

 

we'll try and get this fixed properly, but unlike the other fixes i committed, this will require a bit more work and testing first.

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2011-03-08 08:10:36     Re: Blackfin as JTAG programmer?

Rutger Hofman (NETHERLANDS)

Message: 98725   

 

Our project did just this. We create an .svf program file off-line, upload it to our platform which has a NAND flash disk, and play the .svf to the FPGA through GPIO pins that connect to the FPGA's JTAG lines. I only created a GPIO cable driver. Check the svn under https://svn.rfidguardian.org/trunk/3rdparty/urjtag/ . The BlackFin GPIO cable is urjtag/src/tap/cable/radiotuna_gpio.c and define MRG_PLATFORM == MRG_PLATFORM_RadioTuna547 is true. It is a bit annotated with timer calls, and it attempts to use block set/resets in case the JTAG pins share one GPIO block. We use eCos (RTOS, which is bare-metal as far as this community is concerned). My guess is that if you use uClinux, you can adapt this code without trouble to the API Mike referred to.

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2011-03-08 08:30:27     Re: Blackfin as JTAG programmer?

Rutger Hofman (NETHERLANDS)

Message: 98727   

 

Sorry, the URL should read: https://svn.rfidguardian.org/mrg/trunk/3rdparty/urjtag/

 

Please ignore any certificate exceptions.

 

Rutger

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2011-03-08 10:17:24     Re: Blackfin as JTAG programmer?

Mike Frysinger (UNITED STATES)

Message: 98729   

 

a generic gpio cable driver has been merged upstream and into the blackfin tree.  it should work for every arch out there, Blackfin included.

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2011-03-08 11:50:28     Re: Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98731   

 

Where is this in the blackfin tree?

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2011-03-08 12:09:18     Re: Blackfin as JTAG programmer?

Mike Frysinger (UNITED STATES)

Message: 98732   

 

you're using the blackfin website right now ... just visit the toolchain svn

 

https://blackfin.uclinux.org/gf/project/toolchain/scmsvn/

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2011-03-08 12:13:01     Re: Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98733   

 

Thanks, I was looking in the wrong project.

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2011-03-08 18:51:58     Re: Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98741   

 

How do I disable the bfin command? I would think with a ./configure flag, but doesn't seem like it after looking through source. Just commenting out the core_regnum enum leads to other errors.

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2011-03-08 19:35:13     Re: Blackfin as JTAG programmer?

Mike Frysinger (UNITED STATES)

Message: 98742   

 

odd, it didnt lead to any errors for me

 

use this patch to workaround the issue:

--- a/urjtag/src/cmd/cmd_bfin.c

+++ b/urjtag/src/cmd/cmd_bfin.c

@@ -27,7 +27,7 @@

#include <inttypes.h>

#include <unistd.h>

#ifdef HAVE_SYS_WAIT_H

-#include <sys/wait.h>

+//#include <sys/wait.h>

#endif

 

#include <urjtag/part.h>

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2011-03-09 11:59:47     Re: Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98775   

 

Sorry, I'm a bit confused.

 

I should delete the core_regnum enum definition? There are multiple function prototypes that use this, what happens to those?

 

Commenting out the sys/wait.h include disables the bfin command?

 

I tried this, with enum core_regnum in place, and got linker errors "In function __start" "undefined reference to _main".

 

 

 

I just realized maybe I didn't run the right ./configure command. Since I'm trying to cross-compile for a BF537 host, I used this:

 

CC=bfin-uclinux-gcc ./configure --host=blackfin --without-libusb --disable-werror

 

Does that look right?

 

 

 

Thank you,

 

Ben

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2011-03-09 14:29:39     Re: Blackfin as JTAG programmer?

Mike Frysinger (UNITED STATES)

Message: 98782   

 

no, that isnt how you cross-compile.  simply use `./configure --host=bfin-uclinux ....`.

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2011-03-09 17:26:58     Re: Blackfin as JTAG programmer?

Ben Burleson (UNITED STATES)

Message: 98799   

 

Thank you Mike!

 

It compiled and runs on BF537.

 

Just a note for future reference, the only mod I had to make was the patch commenting out sys/wait.h in cmd_bfin.h

 

 

 

Thanks,

 

Ben

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