2010-10-14 06:27:37     NAND FLASH MT29F2G16AAD with BF532

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2010-10-14 06:27:37     NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94510   

 

Hello,

 

 

 

I am using Micron Flash MT29F2G16AAD-WP-ET-D with Blackfin BF532, I am using plat_nand.c driver with following settings on my board file. (I am using uClinux 2009 Distro).

 

#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)

#ifdef CONFIG_MTD_PARTITIONS

const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };

 

static struct mtd_partition bfin_plat_nand_partitions[] = {

    {

        .name   = "linux kernel(nand)",

        .size   = 0x400000,

        .offset = 0,

    }, {

        .name   = "file system(nand)",

        .size   = MTDPART_SIZ_FULL,

        .offset = MTDPART_OFS_APPEND,

    },

};

#endif

 

#define BFIN_NAND_PLAT_CLE 3

#define BFIN_NAND_PLAT_ALE 2

static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)

{

    struct nand_chip *this = mtd->priv;

 

    if (cmd == NAND_CMD_NONE)

        return;

 

    if (ctrl & NAND_CLE)

        writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));

    else

        writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));

}

 

#define BFIN_NAND_PLAT_READY GPIO_PF14

static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)

{

    return gpio_get_value(BFIN_NAND_PLAT_READY);

}

 

static struct platform_nand_data bfin_plat_nand_data = {

    .chip = {

        .chip_delay = 25,

#ifdef CONFIG_MTD_PARTITIONS

        .part_probe_types = part_probes,

        .partitions = bfin_plat_nand_partitions,

        .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),

#endif

    },

    .ctrl = {

        .cmd_ctrl  = bfin_plat_nand_cmd_ctrl,

        .dev_ready = bfin_plat_nand_dev_ready,

    },

};

 

#define MAX(x, y) (x > y ? x : y)

static struct resource bfin_plat_nand_resources = {

    .start = 0x20000000,

    .end   = 0x20000000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),

    .flags = IORESOURCE_IO,

};

 

static struct platform_device bfin_async_nand_device = {

    .name = "gen_nand",

    .id = -1,

    .num_resources = 1,

    .resource = &bfin_plat_nand_resources,

    .dev = {

        .platform_data = &bfin_plat_nand_data,

    },

};

 

static void bfin_plat_nand_init(void)

{

    gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");

}

 

#else

static void bfin_plat_nand_init(void) {}

#endif

 

It is connected to ASM0 pin so address is 0x20000000,  ALE is connected at DSP_A2, and CLE is connected at DSP_A3.  I have printed few things in Nand_base.c to kind of debug the issue. The code is given below.

 

static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,

                          struct nand_chip *chip,

                          int busw, int *maf_id)

{

    struct nand_flash_dev *type = NULL;

    int i, dev_id, maf_idx;

    int tmp_id, tmp_manf;

 

    /* Select the device */

    chip->select_chip(mtd, 0);

 

    /*

     * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)

     * after power-up

     */

    chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

 

    /* Send the command for reading device ID */

    chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

 

    /* Read manufacturer and device IDs */

    *maf_id = chip->read_byte(mtd);

  

    dev_id = chip->read_byte(mtd);

    printk("*********\n Maf ID %d \n Dev ID %d\n",*maf_id,dev_id);

    /* Try again to make sure, as some systems the bus-hold or other

     * interface concerns can cause random data which looks like a

     * possibly credible NAND flash to appear. If the two results do

     * not match, ignore the device completely.

     */

    //chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

    chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

 

    /* Read manufacturer and device IDs */

 

    tmp_manf = chip->read_byte(mtd);

    tmp_id = chip->read_byte(mtd);

    printk("*********\n Maf ID %d \n Dev ID %d\n",tmp_manf,tmp_id);

    if (tmp_manf != *maf_id || tmp_id != dev_id) {

        printk(KERN_INFO "%s: second ID read did not match "

               "%02x,%02x against %02x,%02x\n", __func__,

               *maf_id, dev_id, tmp_manf, tmp_id);

        printk("second ID read did not match\n ");

 

        return ERR_PTR(-ENODEV);

 

    }

 

 

 

The response which I get at uclinux startup is also given below. It says it has read manufacturer ID 44 which is right but the Device Id read is wrong. it should be 0xCA or 202. which means it is not reading the second byte. Kindly can you let me know what might be the cause of such behaviour..?

 

 

 

 

 

Driver 'ch' needs updating - please use bus_type methods

uclinux[mtd]: RAM probe address=0x3700000 size=0x800000

Creating 1 MTD partitions on "RAM":

0x00000000-0x00800000 : "ROMfs"

Generic platform RAM MTD, (c) 2004 Simtec Electronics

*********

Maf ID 44

Dev ID 44

*********

Maf ID 44

Dev ID 44

****************************************************

Manufactur ID : 44

BUS: 0

Type : -19

No NAND device found!!!

aoe: AoE v47 initialised.

driver isp1362-hcd, 2005-04-04

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-14 22:39:14     Re: NAND FLASH MT29F2G16AAD with BF532

Aaron Wu (CHINA)

Message: 94525   

 

From your log I think it's because it did not find a nand_flash_ids that match yours, in the code:

 

   for (i = 0; nand_flash_ids[i].name != NULL; i++) {

                if (dev_id == nand_flash_ids[i].id) {

                        type =  &nand_flash_ids[i];

                        break;

                }

        }

 

Have you added an entry in the nand_flash_ids table for your own Nand?

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2010-10-15 01:09:02     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94533   

 

Thanks for the reply Aaron.

 

The entry in Nand_Flash_ids is already there but my main concern is why its reading wrong Device_ID..?

 

As the Manufacturer ID for my nand is 0x2C which is 44 and that is correctly read, but the Device ID for my nand is 0xCA but it reads it again 44 which is Manufacturer ID, So the issue seems to be that its reading the first byte only and not moving towards the second byte.

 

what is that is causing such behaviour..?

 

 

 

READ_ID Operation timeline diagram in Datasheet says that signal RE# i.e. given by DSP_ARE, has to be toggled to read next byte. so is this being done any where in driver or I have to do it..

 

Kindly help..

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-15 01:13:16     Re: NAND FLASH MT29F2G16AAD with BF532

Mike Frysinger (UNITED STATES)

Message: 94534   

 

might want to review the documentation:

  docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:bfin_async_nand

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2010-10-15 01:25:32     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94537   

 

Thanks Mike for the reply..

 

 

 

Yes I have seen this and the chip seems to support Dont Care feature and the settings in Stamp.c is been used with the correction of ALE, CLE and Busy Pins..

 

It is now showing this behaviour the it does not go to second byte..

 

Kindly let me know where I am going wrong.?

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-15 05:09:04     Re: NAND FLASH MT29F2G16AAD with BF532

Aaron Wu (CHINA)

Message: 94554   

 

It looks like a timming sequence compatible issue. Actually I don't think we have tested the Nand chip you are using, so it's not guarranted to work. In cases like this often customer have to analysis the timming sequence.  We suggest you to capture the signal on related pins with an osilloscope and compare it with the waveform required in your datasheet, change the generic plat nand code as needed.

 

Another clue is you can lower the bus clock speed to have a try, this can be done in the menuconfig for kernel option: Blackfin Processor Option->Board Customization

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2010-10-15 06:07:39     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94557   

 

Thanks again Aaron for the reply.

 

 

 

To start with I thought of reducing bus clock speed ..

 

which configuration correspond to bus speed is it SCLK , if so when I enable

 

[ ] Re-program Clocks while Kernel boots?

 

with dividing factor of 5 it gives me following error.

 

arch/blackfin/mach-common/arch_checks.c:45:3: error: #error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier"

 

 

just wanted to confirm is this the setting you are talking about? if so the range says 1-15 so what should be its value ?

 

 

 

Regards

 

Usama Bin shakeel

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2010-10-15 06:40:58     Re: NAND FLASH MT29F2G16AAD with BF532

Aaron Wu (CHINA)

Message: 94558   

 

Yes here is for you to lower the overall SCLK clock speed,  value can be between 1-15, you can have a try to see which will work on your system. BTW I did not encounter the error you mentioned on my side.

 

Note that it might not be a good idea to lower the clock speed since it will impact the system performance. Another choice is to adjust the timming charactor only, you can do it by change the config:

 

Blackfin Processor Option-->EBIU_AMBCTL Control-->  <Your actual bank>,  consult the Hardware Reference manual for the atcual meaning for EBIU_AMBCTL register

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2010-10-18 04:07:52     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94670   

 

Hello Aarun,

 

I tried the by slowing the SCLK and by changing the value of bank 0 because the nand flash is connected to ASM0 pin. None of these worked. While searching I went through the following link. I am having almost same problem. In uboot it does not even reads the device ID correct. Although I am using the same Nand_plat.c. Kindly if you could tell me how they resolved this issue.? I am using the trunk ver of u-boot now.

 

  blackfin.uclinux.org/gf/project/u-boot/tracker/?action=TrackerItemEdit&tracker_item_id=4996

 

 

 

Kindly help

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-18 05:36:36     Re: NAND FLASH MT29F2G16AAD with BF532

Aaron Wu (CHINA)

Message: 94671   

 

The Link you mentioned is quite old and it's for the issues in u-boot,  if you wan to look into the details you may check the code change according to the date on svn trunk like this:

 

svn log -r {2009-04-05} : {2009-04-12}

 

suggest you to update to the latest u-boot version as well as the Linux distribution so later changes will be included.

 

Our verified Nand chip is nand01gw3b*, I suggest you to focus on the difference on the user manual between ours and that of your MT29F2G16. For example, we are using the 8-bits bus width Nand while suppose yours is 16-bits.

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2010-10-18 13:55:57     Re: NAND FLASH MT29F2G16AAD with BF532

Ron Weiland (UNITED STATES)

Message: 94680    Usama, see if perhaps this thread is applicable to you:

 

  blackfin.uclinux.org/gf/project/toolchain/forum/?action=ForumBrow

se&forum_id=39&_forum_action=ForumMessageBrowse&thread_id=37365

 

Ron Weiland

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2010-10-19 02:48:48     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94688   

 

Thanks Aaron,

 

that is I m trying to do . nut I am wondering why the nand_plat is behaving in different manner in u-boot and uclinux. As I have previously told as well uclinux reads the manufacturer ID correct but does not move to Device ID. where as u boot reads the ID's totally wrong.

 

 

 

On 16 bit issue I have no clue what should I do as previously I was using IP04 board which has samsung 8 bit NAND Flash and was working fine..

 

I was thinking now to probe what signals are coming on nand, so we could move a step forward.

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-19 02:54:32     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94689   

 

Thanks Ron for the reply..

 

 

 

I have downloaded the latest trunk version of u-boot and it does have the following flow.

 

 

 

    /* Select the device */

    chip->select_chip(mtd, 0);

 

    /*

     * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)

     * after power-up

     */

    chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);

 

    /* Send the command for reading device ID */

    chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

 

    /* Read manufacturer and device IDs */

    *maf_id = chip->read_byte(mtd);

    dev_id = chip->read_byte(mtd);

 

    printk("MANUFACTURER ID : %d \n Device ID : %d \n",*maf_id,dev_id);

    /* Try again to make sure, as some systems the bus-hold or other

     * interface concerns can cause random data which looks like a

     * possibly credible NAND flash to appear. If the two results do

     * not match, ignore the device completely.

     */

 

    chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

 

    /* Read manufacturer and device IDs */

 

    tmp_manf = chip->read_byte(mtd);

    tmp_id = chip->read_byte(mtd);

 

    printk("MANUFACTURER ID : %d \n Device ID : %d \n",tmp_manf,tmp_id);

    if (tmp_manf != *maf_id || tmp_id != dev_id) {

        printk(KERN_INFO "%s: second ID read did not match "

               "%02x,%02x against %02x,%02x\n", __func__,

               *maf_id, dev_id, tmp_manf, tmp_id);

        return ERR_PTR(-ENODEV);

    }

 

 

 

The response to it is:

 

NAND:  MANUFACTURER ID : 3                                                    

Device ID : 0                                                                

MANUFACTURER ID : 3                                                           

Device ID : 253                                                              

nand_get_flash_type: second ID read did not match 03,00 against 03,fd         

No NAND device found!!!                                                       

0 MiB                     

 

Actual manufacturer id is 2C i.e. 44

 

and Device ID is CA i.e. 202

 

 

 

and as said above the uclinux reads the Manufacturer ID correct but not device ID.

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-19 03:00:37     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94690   

 

Aaron has any body used 16 bit nand flash previously..?

 

the settings in Configs file are following

 

/*

* NAND Settings

*/

#define CONFIG_NAND_PLAT

#define CONFIG_SYS_NAND_BASE        0x20000000

#define CONFIG_SYS_MAX_NAND_DEVICE    1

 

#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 3))

#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))

#define BFIN_NAND_WRITE(addr, cmd) \

    do { \

        bfin_write8(addr, cmd); \

        SSYNC(); \

    } while (0)

 

#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)

#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)

#define NAND_PLAT_GPIO_DEV_READY       GPIO_PF14

 

which seems to be all for 8 bit. I have tried bfin_write16 but that did not made a difference..

 

Is there something else also to be changed like IO_ADDR etc.

 

 

 

Regards

 

Usama Bin Shakeel

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2010-10-19 03:21:16     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94725   

 

I think the difference in uclinux and uboot is of chip delay.

 

so in the latest trunk of uboot how would we specify chip delay..?

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2010-10-19 15:21:52     Re: NAND FLASH MT29F2G16AAD with BF532

Mike Frysinger (UNITED STATES)

Message: 94738   

 

the only NAND we've tested is the one documented in the wiki as part of the cf/ide/nand addon card

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2010-10-19 15:24:31     Re: NAND FLASH MT29F2G16AAD with BF532

Mike Frysinger (UNITED STATES)

Message: 94739   

 

there is no delay.  only the gpio pin.  otherwise, you can tweak your write macros in your board config.

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2010-10-20 02:08:38     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94752   

 

Thanks Mike for the reply.

 

I found the chip delay in this function in nand_base.c

 

static void nand_set_defaults(struct nand_chip *chip, int busw)

{

    /* check for proper chip_delay setup, set 20us if not */

    if (!chip->chip_delay)

        chip->chip_delay = 30;

...

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2010-10-20 02:12:24     Re: NAND FLASH MT29F2G16AAD with BF532

Usama Shakeel (PAKISTAN)

Message: 94753   

 

Ron can u tell me what u set the value of

 

#define CONFIG_EBIU_AMBCTL0_VAL

 

as my nand is on AMS0 pin so I have set this 0xFFC2FFC2

 

Kindly reply.

 

Regards

 

Usama Bin Shakeel

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