2010-06-07 12:00:43     spi_async() Question

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2010-06-07 12:00:43     spi_async() Question

David Kasper (UNITED STATES)

Message: 90174   

 

Does spi_async() perform transactions using DMA or PIO (or is this configurable via the board configuration)?  If DMA then should I invalidate the cache addresses range supporting the receive data buffer before processing the data.  This is supporting a touchscreen implementation similar to the AD7877 in which an interrupt may occur in the middle of an asynchronous SPI transaction.

 

Thanks,

 

David Kasper

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2010-06-07 12:09:25     Re: spi_async() Question

Mike Frysinger (UNITED STATES)

Message: 90175   

 

the documentation explains that DMA vs PIO is handled by your board resources:

  docs.blackfin.uclinux.org/doku.php?id=spi

 

it also explains that all SPI buffers are DMA safe which means no SPI driver should be dealing with cache issues (wrt the SPI transfers):

linux-2.6.x/Documentation/spi/spi-summary

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2010-06-07 16:07:01     Re: spi_async() Question

David Kasper (UNITED STATES)

Message: 90177   

 

Mike,

 

Am I correct to assume that spi_async() is non-blocking is handled under kernel context?

 

Thanks,

 

David Kasper

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2010-06-07 18:18:58     Re: spi_async() Question

Mike Frysinger (UNITED STATES)

Message: 90178   

 

spi_async() is one of the few functions not documented as "can sleep"

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