2010-05-06 18:56:42     Changing chip select timing (parallel bus) after Linux boots

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2010-05-06 18:56:42     Changing chip select timing (parallel bus) after Linux boots

Steve Strobel (UNITED STATES)

Message: 89204   

 

I am working on a plug-in board that we plan to install in units that have already been deployed in the field.  When it is installed, the additional loading on the parallel bus causes reads from one of the chips on the original board to be incorrect;  that chip has weak output drivers and needs a longer chip select duration to overcome the additional load.

 

Unless I am mistaken, the "right" way to solve the problem would be to change the chip select setup in U-Boot, but I would rather not have to update U-Boot on the units that have already been deployed (updating the uClinux image is OK).  So I am wondering if there is a recommended way to lengthen the duration of the chip select once Linux boots.  I think it would be relatively easy to figure out how to poke the needed value into one of the Blackfin processor registers either from a driver or from userland code (assuming memory protection is turned off).  Is there a better way?  Thanks for any suggestions.

 

Steve

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2010-05-06 19:30:59     Re: Changing chip select timing (parallel bus) after Linux boots

Mike Frysinger (UNITED STATES)

Message: 89205   

 

the kernel config has its own async timings it programs independent of u-boot all the time.  look in the Blackfin configuration submenu.

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2010-05-10 14:08:01     Re: Changing chip select timing (parallel bus) after Linux boots

Steve Strobel (UNITED STATES)

Message: 89291   

 

That was what I needed.  Thanks.

 

Steve

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