2009-11-23 06:21:57     Question on changing the core voltage and level.

Document created by Aaronwu Employee on Aug 19, 2013
Version 1Show Document
  • View in full screen mode

2009-11-23 06:21:57     Question on changing the core voltage and level.

V Hemanth Kumar (INDIA)

Message: 82638   

 

Hi,

 

We are using an external voltage regulator for generating the core voltage to BF527. We can change the core voltage for the processor using I2C interface of the ext volt regulator.

 

Reason for this is, our custom design is on 1.8VDDEXT hence according to the processor datasheet we cannot use internal voltage regulator.

 

In the BF52x HRM volume1 there is no section mentioning about the sequence to change the internal core voltage levels (when an external voltage regulator is used).

 

As per our understanding the process of changing the core voltage and level is as follows:

1.  Program the ext volt regulator through I2C to change the core voltage.

2.  Code logic to change the core voltage level:-

            -    Check if the required core voltage VDDINT is in the range 0.85V<=VDDINT<=1.20V.

            -    Program the VLEV (7 to 4 bits) in VR_CTL corresponding to required VDDINT.

 

 

Few questions:

a.  Is this sequence of programming appropriate (point 2 above)?

b.  Should we program the PLL registers after changing the core voltage?

c.  In the distribution is there any code which does this? (I think "arch/blackfin/mach-common/dpmc.c" has some code to do this.)

 

Pls suggest us with ideas on this.

 

~ Hemanth

QuoteReplyEditDelete

 

 

2009-11-23 06:47:29     Re: Question on changing the core voltage and level.

Robin Getz (UNITED STATES)

Message: 82639   

 

Hemanth:

 

>our custom design is on 1.8VDDEXT hence according to the processor datasheet we cannot use internal voltage regulator.

 

Where in the datasheet does it say that? Most of the specs in the datasheet that have to do with VDDINT are TDB.

 

-Robin

QuoteReplyEditDelete

 

 

2009-11-23 06:48:15     Question on changing the core voltage and level.

Michael Hennerich (GERMANY)

Message: 82640    In case you use the external regulator option you don't need to touch VLEV at all.

 

SS/PG is used as a power-good indicator from the regulator:

 

HRM:

"In external regulator mode (VRSEL=1), the VDDINT is supplied by an

external regulator and the pin SS/PG is used to accept an active-low

power-good indicator from the regulator"

 

 

The sequence must ensure that you never operate the CORE with out of spec frequency and voltage pair.

So when increasing the CORE CCLK program/set VDDINT prior in increasing the frequency.

Make sure that VDDINT reached its target value prior in modifying PLL regs.

QuoteReplyEditDelete

 

 

2009-11-23 10:04:33     Re: Question on changing the core voltage and level.

Wolfgang Muees (GERMANY)

Message: 82643   

 

Robin,

 

>our custom design is on 1.8VDDEXT hence according to the processor datasheet we cannot use internal voltage regulator.  Where in the datasheet does it say that? Most of the specs in the datasheet that have to do with VDDINT are TDB.

 

Figure 5. ADSP-BF523/525/527 Voltage Regulator Circuit

 

VDDEXT = 2.25 to 3.6 Volt

 

and on Page 29, VDDext with internal Regulator enabled.

 

regards

 

Wolfgang

 

---

TranslateQuoteReplyEditDelete

 

 

2009-11-23 11:20:59     Re: Question on changing the core voltage and level.

Robin Getz (UNITED STATES)

Message: 82645   

 

Wolfgang:

 

Figure 5 on the datasheet is described as : "Figure 5 shows the typical external components required to complete the power management system." It is not a specification.

 

But you are correct - I see it now on page 29 (on the un-numbered table) - VDDEXT spec - Nonautomotive models, Internal Voltage Regulator Disabled - 1.7 -> 3.6V. For  "Nonautomotive models, Internal Voltage Regulator Enabled" - the spec is min of 2.25V.

 

Thanks

 

-Robin

Attachments

    Outcomes