2009-11-09 20:31:50     a BUG at drivers/serial/bfin-sport-uart.c

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2009-11-09 20:31:50     a BUG at drivers/serial/bfin-sport-uart.c

light joy (UNITED STATES)

Message: 82229   


i use sport as my console, in UP case, all is OK, but in SMP case, the console output:


bfin>bootm 2800000

## Booting kernel from Legacy Image at 02800000 ...

   Image Name:   Linux-

   Image Type:   Blackfin Linux Kernel Image (gzip compressed)

   Data Size:    3376079 Bytes =  3.2 MB

   Load Address: 00001000

   Entry Point:  002cba88

   Verifying Checksum ... OK

   Uncompressing Kernel Image ... OK

Starting Kernel at = 002cba88

Linux version (wmz@localhost.localdomain) (gcc version 4.1.2 (ADI svn)) #53 SMP Tue Nov 3 23:06:24 CST 2009

bootconsole [early_shadow0] enabled

Board Memory: 48MB

Kernel Managed Memory: 32MB

Memory map:

  fixedcode = 0x00000400-0x00000490

  text      = 0x00001000-0x00143da0

  rodata    = 0x00143da0-0x00193cd0

  bss       = 0x00194000-0x002a9f78

  data      = 0x002a9f80-0x002be000

    stack   = 0x002bc000-0x002be000

  init      = 0x002be000-0x00743000

  available = 0x00743000-0x01eff000

  DMA Zone  = 0x01f00000-0x02000000

Hardware Trace Active and Enabled

Boot Mode: 2

Blackfin support (C) 2004-2009 Analog Devices, Inc.

Compiled for ADSP-BF561 Rev 0.5

Blackfin Linux support by   blackfin.uclinux.org/

Processor Speed: 499 MHz core clock and 99 MHz System Clock

NOMPU: setting up cplb tables

NOMPU: setting up cplb tables

Instruction Cache Enabled for CPU0

Data Cache Enabled for CPU0 (write-through)

Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 7873

Kernel command line: console=ttySS1,57600n7 root=/dev/mtdblock0 mem=32m max_mem=48m

Configuring Blackfin Priority Driven Interrupts

PID hash table entries: 128 (order: 7, 512 bytes)

console [ttySS1] enabled, bootconsole disabled

Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)

Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)

Memory available: 24004k/32768k RAM, (4628k init code, 1291k kernel code, 1513k data, 1024k dma, 304k reserved)

Calibrating delay loop... 991.23 BogoMIPS (lpj=1982464)

Security Framework initialized

Mount-cache hash table entries: 512

CoreB bootstrap code to SRAM ff600000 via DMA.

Booting Core B.

Instruction Cache Enabled for CPU1

Data Cache Enabled for CPU1 (write-through)

Calibrating delay loop... 991.23 BogoMIPS (lpj=1982464)

Brought up 2 CPUs

SMP: Total of 2 processors activated (1982.46 BogoMIPS).

Blackfin Scratchpad data SRAM: 4 KB

Blackfin Scratchpad data SRAM: 4 KB

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data A SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Data B SRAM: 16 KB (16 KB free)

Blackfin L1 Instruction SRAM: 16 KB (15 KB free)

Blackfin L1 Instruction SRAM: 16 KB (15 KB free)

Blackfin L2 SRAM: 128 KB (127 KB free)

net_namespace: 296 bytes

NET: Registered protocol family 16

Blackfin DMA Controller

ezkit_init(): registering device resources

NET: Registered protocol family 2

IP route cache hash table entries: 1024 (order: 0, 4096 bytes)

TCP established hash table entries: 1024 (order: 1, 8192 bytes)

TCP bind hash table entries: 1024 (order: 1, 8192 bytes)

TCP: Hash tables configured (established 1024 bind 1024)

TCP reno registered

NET: Registered protocol family 1

msgmni has been set to 46

io scheduler noop registered

io scheduler anticipatory registered (default)

io scheduler cfq registered

bfin-dma: initialized

simple-gpio: now handling 48 GPIOs: 0 - 47

Serial: Blackfin serial driver

bfin-uart.1: ttyBF0 at MMIO 0xffc00400 (irq = 35) is a BFIN-UART

bfin-sport-uart.1: ttySS1 at MMIO 0xffc00900 (irq = 32) is a SPORT1

brd: module loaded

dm9000 Ethernet Driver, V1.31

eth0: dm9000a at 2c000000,2c000004 IRQ 117 MAC: 00:00:12:34:56:78 (platform data)

physmap platform flash device: 00800000 at 20000000

physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank

Amd/Fujitsu Extended Query Table at 0x0040

number of CFI chips: 1

cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.

RedBoot partition parsing not available

Using physmap partition information

Creating 3 MTD partitions on "physmap-flash.0":

0x00000000-0x00040000 : "bootloader(nor)"

0x00040000-0x00200000 : "linux kernel(nor)"

0x00200000-0x00800000 : "file system(nor)"

bfin-spi bfin-spi.0: Blackfin on-chip SPI Controller Driver, Version 1.0, regs_base@ffc00500, dma channel@34

i2c-gpio i2c-gpio.0: using pins 1 (SDA) and 0 (SCL)

bfin-wdt: initialized: timeout=20 sec (nowayout=0)

mmc_spi spi0.5: ASSUMING 3.2-3.4 V slot power

mmc_spi spi0.5: SD/MMC host mmc0, no DMA, no WP, no poweroff

mmc_spi spi0.5: requested mode not fully supported

mmc_spi spi0.5: can't change chip-select polarity

TCP cubic registered

NET: Registered protocol family 17

RPC: Registered udp transport module.

RPC: Registered tcp transport module.

Freeing unused kernel memory: 4628k freed



and there is nothing more.


i traced the kernel, and found a bug at bfin-sport-uart.c:


static void sport_stop_tx(struct uart_port *port)


struct sport_uart_port *up = (struct sport_uart_port *)port;


pr_debug("%s enter\n", __func__);


/* Although the hold register is empty, last byte is still in shift

  * register and not sent out yet. So, put a dummy data into TX FIFO.

  * Then, sport tx stops when last byte is shift out and the dummy

  * data is moved into the shift register.


SPORT_PUT_TX(up, 0xffff);

while (!(SPORT_GET_STAT(up) & TXHRE))










when coreb execute the above code, it will fall into the deadline loop because TSPEN bit is DISABLED.






2009-11-10 23:36:16     Re: a BUG at drivers/serial/bfin-sport-uart.c

Sonic Zhang (CHINA)

Message: 82262   


Thank you for report this bug in SMP kernel. It is fixed on SVN trunk and 2009R1 branch. Please have try.