2009-08-07 06:26:38     info needed on fpga programmer

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2009-08-07 06:26:38     info needed on fpga programmer

V Hemanth Kumar (INDIA)

Message: 78496   

 

Dear Michael Henerich,

 

We have interfaced Xilinx Spartan 3E FPGA to our custom board (BF527 core) through SPI interface.

 

The DONE, INIT_B and PROG_B are connected to PF14, PF11 and PF15 respectively.

By default INIT_B & PROG_B pins are pulled high through pull up resistors.

 

We are using the slave serial mode to program the FPGA.

 

We are using ".bin" file to program through VDSP. We are able to see proper signalling over the INIT_B.

But when we have completed the transfer of fpga data bits over SPI the Xilinx FPGA does not pull the DONE pin high.

And we also checked the INIT_B pin which remains high after the transaction, indicating no CRC error.

But we are not sure why fpga is not getting programmed and it is not pulling the DONE pin high.

The SPI settings used by us were 1MHz SPI CLK, 8 bits, LSB 1st.

 

So we are planning to use the fpga_loader developed by you for programming the fpga.

 

We have few questions:

 

1. We would like to know the SPI settings used by you for the FPGA programming? For SPI CLK,

data size (8 or 16), LSB/MSB 1st?

 

2. So should we use the bit file or the bin file generated by Xilinx tool to program the FPGA?

 

Please give us your inputs on this.

 

Thanks.

Hemanth Varadha.

QuoteReplyEditDelete

 

 

2009-08-07 06:54:08     info needed on fpga programmer

Michael Hennerich (GERMANY)

Message: 78498    >1. We would like to know the SPI settings used by you for the FPGA

programming? For SPI CLK,

>data size (8 or 16), LSB/MSB 1st?

 

8-bit, MSB first - which is the spidev default =20

 

root:/> fpga_loader /home/firmware.bin

/dev/spidev0.1: spi mode 2, 8 bits per word, 3125000 Hz max

..........................................

root:/

 

>2. So should we use the bit file or the bin file generated by Xilinx

tool to program the FPGA?

 

You need to use the bin file.

 

-Michael

 

2009-08-07 06:26:38     info needed on fpga programmer

V Hemanth Kumar (INDIA)

Message: 78496   

 

Dear Michael Henerich,

 

We have interfaced Xilinx Spartan 3E FPGA to our custom board (BF527 core) through SPI interface.

 

The DONE, INIT_B and PROG_B are connected to PF14, PF11 and PF15 respectively.

By default INIT_B & PROG_B pins are pulled high through pull up resistors.

 

We are using the slave serial mode to program the FPGA.

 

We are using ".bin" file to program through VDSP. We are able to see proper signalling over the INIT_B.

But when we have completed the transfer of fpga data bits over SPI the Xilinx FPGA does not pull the DONE pin high.

And we also checked the INIT_B pin which remains high after the transaction, indicating no CRC error.

But we are not sure why fpga is not getting programmed and it is not pulling the DONE pin high.

The SPI settings used by us were 1MHz SPI CLK, 8 bits, LSB 1st.

 

So we are planning to use the fpga_loader developed by you for programming the fpga.

 

We have few questions:

 

1. We would like to know the SPI settings used by you for the FPGA programming? For SPI CLK,

data size (8 or 16), LSB/MSB 1st?

 

2. So should we use the bit file or the bin file generated by Xilinx tool to program the FPGA?

 

Please give us your inputs on this.

 

Thanks.

Hemanth Varadha.

QuoteReplyEditDelete

 

 

2009-08-07 06:54:08     info needed on fpga programmer

Michael Hennerich (GERMANY)

Message: 78498    >1. We would like to know the SPI settings used by you for the FPGA

programming? For SPI CLK,

>data size (8 or 16), LSB/MSB 1st?

 

8-bit, MSB first - which is the spidev default =20

 

root:/> fpga_loader /home/firmware.bin

/dev/spidev0.1: spi mode 2, 8 bits per word, 3125000 Hz max

..........................................

root:/

 

>2. So should we use the bit file or the bin file generated by Xilinx

tool to program the FPGA?

 

You need to use the bin file.

 

-Michael

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