2009-04-30 14:29:00     bfin-dma app hangs

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2009-04-30 14:29:00     bfin-dma app hangs

Ashish Gupta (INDIA)

Message: 73489   

 

Hi

 

Moving further in my endeaver to have a reliable communication scheme between bluetechnix CMBF537E module and FPGA (EBIU AMC control, Addr, Data lines are mapped from blackfin to FPGA), I have tried the bfin-dma driver documented here: -

 

http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:bfin-dma

 

However when I compiled the user code given here, the system hangs after

 

'ioctl(fd, BF_DMA_REQUEST, &state2);'   (line no 122, see attached file).

 

Q1. Am I missing something, I copied the code exacltly from the wiki page, does it need some changes? May be the '.channel' field?

 

Q2. Can I access some external devices like FPGA connected to ASYNC bank 2 and 3 (CMBF537E module brings out nAMS2 and nAMS3 for such uses), by simply passing a pointer that points to 0x20200000 (first location of AMS Bank 2) in the "start address" variable of the structure passed to the bfin-dma driver - struct dmasg, for example: -

 

int * bank_address = 0x20020000;

 

 

 

struct dma_state state2 = {

 

.channel = 1,

 

.dsc_src = {

 

.next_desc_addr = NULL,

 

.start_addr = src2,

 

.cfg = 0x85,

 

.x_count = sizeof(src2) / 2,

 

.x_modify = 2,

 

},

 

.dsc_dst = {

 

.next_desc_addr = NULL,

 

.start_addr = bank_address,

 

.cfg = 0x87,

 

.x_count = sizeof(src2) / 2,

 

.x_modify = 2,

 

},

 

};

 

 

 

Please find the file I compiled that generated following output: -

 

 

 

root:/home> ./Memdma_ucl

 

open(/dev/bfin-dma) = 3

 

ioctl(3, 0, 5242288) = 0

 

system hangs after this.

 

Thanks & regards

 

Ashish

 

main.c

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2009-04-30 14:41:53     Re: bfin-dma app hangs

Mike Frysinger (UNITED STATES)

Message: 73490   

 

the driver doesnt do any checking at all on your DMA descriptors.  so if you configure them wrong, the system will suffer (hang/crash/reboot/whatever).  it was designed this way on purpose: the driver merely programs DMA channels for low overhead.

 

the async banks can be accessed directly from user space without any magic.

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2009-04-30 15:19:10     bfin-dma app hangs

Michael Hennerich (GERMANY)

Message: 73491    Ashish,

 

I remember you recently complained about the bfin_ppi driver causing PPI underrrun errors.

I took some time yesterday and today to root cause these. They are definetly NOT caused by bandwidth limitations.

 

- Still think PPI should be your preferred choice.

 

The underrun errors are actually caused by the fact that the Framesync FS1 asserts immediately again after the last payload word is transferred.

 

Since there is no DMA active to provide more date the PPI will assert the UNDERRUN condition.

By default the PPI_ERROR interrupt has higher priority than the DMA (DONE) Interrupt therefore you will se the PPI error interrupt asserting, even when all words are properly sent out...

 

1) lower the PPI ERROR interrupt priority, below the IRQ_PPI.

OR (and)

2) Odd some timer delay between FS1 assertions (Will add some duty cycle option to the bfin_ppi driver to control this.

 

Best regards,

Michael

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