2008-12-05 09:36:01     Cascading DMAS

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2008-12-05 09:36:01     Cascading DMAS

Phil Wilshire (UNITED STATES)

Message: 66412   




I am researching a problem related to high speed data transfer.


I am reading PPI data into L1 memory at 25 MHz but want to get it out of there into SDRAM.


I cannot read directlry into SDRAM because of PPI sync problems.


My idea is to set up two DMAs, one to read the PPI into L1 ,


the second  will then do the MDMA transfer into SDRAM from the L1 memory


I have a number of incoming L1 blocks and get an interrupt when each block completes.


This works fine.


I want to triger the second MDMA on the completion of  of one of the L1 blocks.


I am considering setting up a number of descriptors for the MDMA  SDRAM transfer  with


the DMA enabled bit  not set in the descriptor config register


The PPI DMA interrupt would then simply enable the SDRAM transfer either in the config register or in the


next descriptor.


Of course there will be some complications to solve but I was interested in the concept


of having a linked list of descriptors with the dma enable bit cleared.


Allowing the completion of some other process to simply allow the pending DMA to proceed.


Any Thoughts ??


.  Regards  Phil Wilshire






2008-12-16 05:26:41     Re: Cascading DMAS

Michael Hennerich (GERMANY)

Message: 66751   



Hi Phil,


Some time ago I also thought about different techniques of cascading different DMA channels.

As you know descriptor chains work only with a single channel.

You certainly can setup a circular L1 PPI DMA descriptor chain, and trigger PPI DMA interrupts at certain points.

In the PPI DMA ISR you have to somehow trigger the L1->L3 MEMDMA.

I think you want to do that as efficient as possible without the overhead of setting up register based MEMDMA transfers.

The way how you setup the descriptor blocks or chains is up to you.


You can use following modes:


Descriptor Array Mode

Descriptor List (Small Model) Mode

Descriptor List (Large Model) Mode


For example you can trigger a Descriptor Array Block by simply writing DMAx_CURR_DESC_PTR.

Besides the DMAEN bit you may set FLOW = 0x0 (Stop Mode) in each Blocks DMA_CONFIG. This will also gracefully stop the current Block after completion.