2008-06-02 16:38:04     1G x 8 flash on BF533

Document created by Aaronwu Employee on Aug 6, 2013
Version 1Show Document
  • View in full screen mode

2008-06-02 16:38:04     1G x 8 flash on BF533

Ron Weiland (UNITED STATES)

Message: 56585   

 

Anyone know how I can map in a 29F8G08 (1g x 8) NAND flash?  The device has separate CE# for each of two 512M x 8 banks.  Supposedly the PNAV board is / was using a 1g x 8 NAND flash, but I don't know what part they were using and it doesn't appear to have used separate chip enables.

 

Thanks!

 

Ron

 

 

QuoteReplyEditDelete

 

 

2008-06-12 04:00:46     Re: 1G x 8 flash on BF533

Mike Frysinger (UNITED STATES)

Message: 57065   

 

i'll see if i can find the schematics for the PNAV, but we do have examples (hardware and software) for how to work with a smaller NAND device via the asynchronous memory bank.

 

please see the CF/IDE/NAND card: http://docs.blackfin.uclinux.org/doku.php?id=hw:cards:cf-ide-nand

QuoteReplyEditDelete

 

 

2008-06-12 09:17:47     Re: 1G x 8 flash on BF533

Mike Frysinger (UNITED STATES)

Message: 57129   

 

sorry, i forgot to note ... software wise, the same driver is used for both boards:

 

http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:bfin_async_nand

QuoteReplyEditDelete

 

 

2008-06-12 20:45:10     Re: 1G x 8 flash on BF533

Ron Weiland (UNITED STATES)

Message: 57188   

 

Thank you very much for your reply, Mike.

 

I'm using a 29F2G08 (256M x 8) just fine now, but could sure use the extra room!  Schematics for the PNAV board would probably help.  I'll check out your links and see if I can glean anything useful.  It confuses me that it would need two separate chip enables and thus two hardware addresses.

 

Cheers!

 

Ron Weiland

 

 

QuoteReplyEditDelete

 

 

2008-06-13 03:43:47     Re: 1G x 8 flash on BF533

Michael Hennerich (GERMANY)

Message: 57204   

 

Can you please revisit the docu page:

 

http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:bfin_async_nand

 

I fixed some links - there is a schematic on this page. It's exactly the same interface as on the pnav.

 

-Michael

QuoteReplyEditDelete

 

 

2008-06-13 14:00:38     Re: 1G x 8 flash on BF533

Ron Weiland (UNITED STATES)

Message: 57251   

 

Thanks, Michael.  Do you happen to know what chip(s) the PNAV is using?   According to bfin_nand.c, it looks like they are using a single 1G x 8 but the link only shows a 16M x 8.

 

The interface I am using now is virtually the same as shown in the link and works fine for 258M x 8 and I believe will work fine up to 512M x 8.

 

With Micron though, when you go to the 1G x 8 it uses dual chip enables (512M x 8 each) so it is as if it is two separate chips.  I've mapped the chip enables at 0x20060030 and 0x20060040.   Do I have to declare these as separate resources as if it is two chips, or is there a way to map it so it is contiguous?

 

Thanks again!

 

Ron Weiland

 

 

QuoteReplyEditDelete

 

 

2008-06-13 14:39:03     Re: 1G x 8 flash on BF533

Michael Hennerich (GERMANY)

Message: 57253   

 

Ron,

 

the PNAV uses a Samsung K9K8G08U0M-PIB0. (1Gx8) This chip uses 1 /CS. However the 2G version also uses 2 /CS.

 

I think you have to declare them as seperate resources.

 

-Michael

QuoteReplyEditDelete

 

 

2008-06-13 16:17:49     Re: 1G x 8 flash on BF533

Ron Weiland (UNITED STATES)

Message: 57265   

 

Thanks again, Michael.  Exactly the info I was looking for.  Much appreciated.

 

Ron Weiland

Attachments

    Outcomes