2008-04-10 10:18:03     Large variance in spi_sync()

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2008-04-10 10:18:03     Large variance in spi_sync()

Hans Eklund (SWEDEN)

Message: 54033    Have made a fix(beta stable) to the old spi_mmc driver for concurrent access since we wont know when the new mainline mmc_spi driver will be stable enough, work is in progress but im not sure when i will have time to complete it.

 

(running uClinux-dist-2008R1-RC2 for this one).

 

Problem: write performance is taking a hit here

 

Im setting up a complete message for writing a block, in a sense stupid, but it actually works.

 

Summarizing all individual transfers(6 + 10 + 513 + 10) = 539 bytes to send

 

spi_mmc_write_mmc_block() {

.

.

 

    t[0].tx_buf = mmc_cmd;

    t[0].len = MMC_CMD_LEN;

    spi_message_add_tail(&t[0], &m);

 

    t[1].rx_buf = cmd_resp;

    t[1].len = CMD_RESP_LEN;

    spi_message_add_tail(&t[1], &m);

 

    t[2].tx_buf = token_and_data;

    t[2].len = TOKEN_AND_DATA_LEN;

    spi_message_add_tail(&t[2], &m);

 

    t[3].rx_buf = data_resp;

    t[3].len = DATA_RESP_LEN;

    spi_message_add_tail(&t[3], &m);

 

    // Send it away, Fingers crossed!

TICu

    spi_sync(pdev->spi_dev, &m);

TOCu("write_block, spi_sync", "")

.

.

}

 

 

TIC and TOC are macros reading CYCLES register for accurate measure and printing difference and converting to time based on core clock,

 

a test run shows(each line for a single 512 byte block write to a SD card)

 

write_block, spi_sync () = 431 us

write_block, spi_sync () = 368 us

write_block, spi_sync () = 370 us

write_block, spi_sync () = 1314 us

write_block, spi_sync () = 5124 us

write_block, spi_sync () = 370 us

write_block, spi_sync () = 10409 us

write_block, spi_sync () = 369 us

write_block, spi_sync () = 377 us

write_block, spi_sync () = 370 us

write_block, spi_sync () = 20335 us

write_block, spi_sync () = 1153 us

write_block, spi_sync () = 369 us

write_block, spi_sync () = 369 us

write_block, spi_sync () = 369 us

write_block, spi_sync () = 374 us

 

If we would only count the 370us transfers we would have reasonable performace. But the immensly slow 20ms transfers is really hitting the breakes here. Whats going on? Why is some transfer so extremely slow. Some variance expected due to task switching latencies, sure,  but look at same test for reading a block:

 

The message is one tx(6 bytes) and one rx(around 800 bytes, reading tokens and data in a single rx);

 

spi_mmc_read_mmc_block (spi_sync) = 1631 us

spi_mmc_read_mmc_block (spi_sync) = 1339 us

spi_mmc_read_mmc_block (spi_sync) = 1247 us

spi_mmc_read_mmc_block (spi_sync) = 1338 us

spi_mmc_read_mmc_block (spi_sync) = 1338 us

spi_mmc_read_mmc_block (spi_sync) = 1336 us

spi_mmc_read_mmc_block (spi_sync) = 1258 us

spi_mmc_read_mmc_block (spi_sync) = 1337 us

spi_mmc_read_mmc_block (spi_sync) = 860 us

spi_mmc_read_mmc_block (spi_sync) = 1350 us

spi_mmc_read_mmc_block (spi_sync) = 895 us

spi_mmc_read_mmc_block (spi_sync) = 1338 us

spi_mmc_read_mmc_block (spi_sync) = 1341 us

spi_mmc_read_mmc_block (spi_sync) = 1341 us

spi_mmc_read_mmc_block (spi_sync) = 1336 us

spi_mmc_read_mmc_block (spi_sync) = 1330 us

 

Quite stable, resulting in ~650Kb/sec as seen from a users perspective. hmmm.. any ideas? Seem to be a heavy penalty for the tx-rx-tx-rx message in the first case. Annoying but also interesting in a way.:)

 

/Hans

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2008-04-11 01:15:28     Re: Large variance in spi_sync()

Vitja Makarov (RUSSIAN FEDERATION)

Message: 54068    Hi, Hans!

 

Some time ago I've noticed that dataflash in u-boot is working faster than in linux kernel.

When you are done with irq you are scheduling next transfer, I think next DMA transfer should be setup in irq handler and initiated in spi_transfer(). But the driver handles both cases PIO and DMA I think problem could be here. May be tasklet should be used for PIO transfers only?

 

vitja.

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2008-04-11 04:49:28     Re: Large variance in spi_sync()

Denis Grigoriev (RUSSIAN FEDERATION)

Message: 54084    Can I help you with something in this research? I'm really want of write perfomance.

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