2008-03-04 09:28:21     DMA_DONE bit of DMA

Document created by Aaronwu Employee on Aug 5, 2013
Version 1Show Document
  • View in full screen mode

2008-03-04 09:28:21     DMA_DONE bit of DMA

kanal kannan (INDIA)

Message: 52027    Hi all,

 

I'm using BF561 ezkit lite and i've incorporated  the PPI0 driver into the kernel.  I've 4 frame buffers to fill video data in circular fashion,  when i run the application, the PPI0 fills the video data in 2 buffers and  the descriptor pointer is not pointing to my 3rd & 4th buffer. After analysis i found that the DMA_DONE bit of DMA status register is enabled  for data transfer is not getting cleared.  Data is getting filled in the initial 2 buffers and after which when ppi0 is disabled the registers & bits pertaining to ppi0 are reset to zero but whereas the DMA_DONE bit of DMA1_0_IRQ_STATUS register still remains uncleared  due to which i'm not getting data in the adjacent buffers. What should i do to clear this bit after each dma transfer and also what should be done to point my DMA_DESC_POINTER to point to the next address location where my 3rd & 4th buffer are present.

 

any help in this regard is highly appreciated.

 

with regards

Kannan

QuoteReplyEditDelete

 

 

2008-03-13 10:00:50     Re: DMA_DONE bit of DMA

Robin Getz (UNITED STATES)

Message: 52453    Kannan:

 

Low level hardware questions are normally answered in the Hardware reference manuals - did you check with the BF561 manual?

 

Thanks

-Robin

Attachments

    Outcomes