FAQ: What general features of Blackfin Cache are not available in CM40x Cache?

Document created by PrasanthR Employee on Jul 25, 2013
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The sole purpose of the ADI Cortex-M4F Code Cache is to accelerate instruction execution from FLASH devices. There are few features that may be available in a more general purpose Cache Controller (such as in Blackfin Processor) but which are not available in AD CM40x. Because the targeted use case is caching instructions, a lot of features related to Data Cache are not available as well. However, the design is efficient enough to speed up execute in place feature of Flash devices. In contrast, Blackfin Cache Controller provides support for a number of advanced configuration features, including that of Data Cache. These options are not present in AD CM40x :

 

  • The Cache controller does not support Way / Line locking.
  • It does not provide a mechanism to define configuration options of application memory blocks (which means no CPLBs)
  • No individual FLUSH / INVALIDATE data-word or line operations are supported; the user can only clear the entire cache.
  • User not allowed to address cache memory directly (no ITEST equivalent registers).

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