MLVDS FAQ: What is the difference between receiver type 1 and receiver type 2?

Document created by ColmR Employee on Nov 12, 2012
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Q: What is the difference between MLVDS receiver type-1 and MLVDS receiver type-2?



M-LVDS specifies two receiver types, as illustrated in Fig 1. (Receiver Differntial Input Votlage versus Reveiver Output State):

Type 1 receivers are optimized for clock signals and have a symmetrical receiver input threshold, +/- 50mV to minimise the pulse width distortion of the receiver output.  It has 25mV of input hysteresis for noise immunity;


Type 2 receivers are optimised for data transmission on a bus.  The receiver input threshold is offset to between +50mV and +150mV, so that when there is no data on the bus the receiver output state is guaranteed to be logic 0.  This allows "diode-or" configuration on the bus, where teh receivers detect a logic zero on the bus when all the drivers are disabled and detect a high state when one or more of teh drivers are active.





Figure 1 - Receiver Differntial Input Votlage versus Reveiver Output State



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