What is the status of pixel output pins when /RESET is held low on the ADV7181C?

Document created by XavE Employee on Oct 21, 2011
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What is the status of the pixel output pins when /RESET is held low on the ADV7181C?

 

When the /RESET pin is held low, the status of the pixel output pins is the following:

 

  • P19 to P12 are Low
  • P11 to P0 are tri-stated
  • HS/CS, VS, FIELD/DE and SFL/SYNC_OUT are Low

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