FAQ: Extending the VCO tuning range of the ADF4193 ultra fast settling PLL

Document created by aharney Employee on Aug 18, 2011Last modified by AndyR on Jan 31, 2012
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How do I get extended VCO tuning range using the ADF4193?




Fastlock in PLLs is a technique whereby the PLL charge pump current is switched dynamically during acquisition so that a high current/wide loop bandwidth is used initially for fast acquisition and a low current/narrow loop bandwidth is then switched in to reduce noise and spurious. When using fastlock you also need to switch in a compensating resistor in the loop filter to ensure the phase margin is consistent for both high and low charge pump settings. ADIsimPLL can help in designing the fastlock filters including the loop filter compensation resistor. You can also design fastlock filters when using active filters but you are restricted to using a non-inverting topology.


The ADF4193 is an ultra fast settling fractional-N PLL which uses a novel charge pump switching technique to achieve sub-10us locktimes without the usual phase disturbance seen with fastlock switching. This is partially achieved by using a differential charge pump and so the ADF4193 integrates a differential amplifier (diff-amp) to convert the differential signals to single-ended voltage required by the majority of VCOs.

The only downside to the integrated diff-amp is the relatively limited limited tuning range of 1.4V to VP3-0.3V, where VP3 can be as high as 5.65V.

If your VCO only needs to tune to 5.35V, then the internal diff amp is fine.

But for applications which require higher tuning ranges the question becomes, how do I get extended VCO tuning range using the ADF4193 ?


There are a couple of options to do this:


  1. Use an external instrumentation amplifier to replace the internal diff-amp. This should be low noise and more importantly have a Gain Bandwidth product of at least 10 times the widest PLL LBW bandwidth so usually needs to be (500kHz x 10) or greater. These can be difficult to source.
  2. Use a low noise quad op-amp to replace the quad diff-amp, for example the OP484. This is more flexible and because the filter is within the PLL feedback loop the degraded CMRR when compared to the instrumentation amplifier is acceptable.
  3. Alternatively use the ADF4150HV high voltage charge pump PLL with a wide PLL LBW and boost mode enabled.This can tune up to 29V.


Check the attached powerpoint for some more detail on this.

I built up prototypes in the lab for each of these options. I ran into stability problems with a instrumentation amplifier which did not have sufficient gain bandwidth ( this has the effect of reducing loop phase margin), so ideally I need to repeat this with some of our better newer InAmps. I did however measure sub-10us phase and frequency locktimes using the quad op-amp (OP484) solution. It is also important to use COG caps for fast locking applications. X7R/X5R caps will exhibit longer phase settling but similar frequency settling compared to the COG caps.