FAQ: VisualDSP++ Workaround for SPI Boot Anomaly 05-00-0490

Document created by jobo23 Employee on Jul 25, 2011Last modified by AndyR on Apr 13, 2012
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Anomaly 05-00-0490 requires a very specific timing element that is unfortunately possible to encounter through normal boot ROM execution.  While the software workaround is a simple fix, it is obviously not possible to modify the ROM code itself.  However, all the processors susceptible to this anomaly also feature the ability to register a "custom boot handler"...if the custom boot handler is exactly the boot ROM code with these minor tweaks, this anomaly is avoided altogether (even for SPI_BAUD=2). The attached ZIP file contains the corrected code to be linked into your project as part of the initialization block to avoid anomaly 05-00-0490, as well as guidance for using it and augmenting it with other initialization customizations that your application may require (changing clock speeds, initializing the external memory interface, etc.).

 

However, additional protection beyond the custom boot handler is required to prevent the init block itself from encountering the same anomaly, which requires modification of the loader file (LDR) output image containing the application boot stream. The Workaround_Description.pdf file in the attached ZIP archive contains the details regarding the nature of the changes required and how to go about making the changes (based on which revision of VisualDSP++ is being used).

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