FAQ: Memory gaps inserted between different sections in L1 block

Document created by Reva@14 Employee on Jul 13, 2018
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How to avoid Memory gaps inserted between different sections in L1 block?







Global arrays must be aligned on a 64-bit word boundary or greater; the compiler will normally use this knowledge when optimizing accesses.



Please refer in the CCES help:
CrossCore® Embedded Studio 2.7.0 > SHARC® Development Tools Documentation > C/C++ Compiler Manual for SHARC® Processors > Compiler > C/C++ Run-Time Model and Environment > Global Array Alignment


For better understanding we provide the below example:


We have used the Memory and object section that you shared:


In source code:
#pragma section("In_Sec_a")
char element1;  /* alignment 1 and 1 byte of padding */


#pragma section("In_Sec_a")
short element2; /* alignment 2 and no padding*/


#pragma section("In_Sec_b")
static float32_t element3[24137];  /* alignment 8 - stored in the location of 0x300008, since Global arrays address should be divisible by 8 */


By default, the compiler inserts any necessary padding to ensure that elements are aligned on their required boundaries.




This document was generated from the following discussion: Memory gaps inserted between different sections in L1 block