FAQ: Is there a relationship between the sample rate and the maximum update rate?

Document created by JLKeip Employee on Mar 29, 2011Last modified by AndyR on Jan 31, 2012
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Is there a relationship between the sample rate and the maximum update rate?




Yes, there is.  In a basic DDS, it is possible to update your tuning words every clock cycle.  As DDS rates have increased, though, ADI determined that interleaving multiple lower speed DDS cores to mimic a higher speed DDS core was more power efficient.  The simplest interleave would have two DDS cores and have the DDS output toggle between those two engines to effectively double the sample rate.  In order to keep the power consumption more manageable we have interleaved more and more cores to push to higher rates.


As of early 2011, the top DDS speed was 1.0 GHz (AD9858, AD9910, AD9912).  These devices feature DDS cores with 4 (AD9912) or 8 (AD9858, AD9910) slower, interleaved cores.  The DDS engine, as a whole, streams through the interleaved engines to establish the 1 GSPS rate.  To prevent glitches and avoid miscalculations in the digital domain, it is important to restrict updates of the tuning words to the point in time where the DDS engine block reverts back to the initial interleaved core, rather than allowing an update to initiate at any point in the interleave process.  This means that for a 1 GSPS DDS with an interlave factor of 8, the actual re-programming requires at least 8 ns between frequency/phase/amplitude changes