FAQ: "What is the highest UART baud rate that can be used while ensuring reliable communication?"

Document created by Narsimh Employee on Mar 2, 2018
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In ADuCM302x and ADuCM4050, the UART baud rate is derived from the PCLK (Peripheral Clock) frequency as per the equation below.

 

 

The fractional baud rate generator as indicated by the equation above, provides the option to configure a precise baud rate. However, for a moment, let's consider a simplified equation, by bypassing the fractional baud rate generator.  

This equation gives us the UART symbol/baud rate. If you are looking for data throughput, this would depend on the number of data bits (between 5 and 8 bits), as well as number of parity bits and stop bits used. The range of resulting word size (data + parity + start and stop bits) would be between 7 and 12 bits. As an example, for baud rate of 1.5 Mbps, the throughput would be 150K words/second for a 10-bit word size comprising of 8 bits of data, 1 start bit and 1 stop bit with no parity.

 

For max PCLK frequencies of 26MHz (maximum PCLK frequency in case of ADuCM302x) and 52MHz (maximum PCLK frequency in case of ADuCM4050) and parameters OSR = 0 and DIV = 1, the simplified equation above actually translates to maximum UART baud rates of 6.5Mbps and 13Mbps for ADuCM302x and ADuCM4050 respectively. Now, it is important to note that these are the theoretical maximum baud rates. The practical UART baud rate that can be achieved in a system will depend on several factors, some of which are listed below for your consideration.

 

1. MCU Data handling capacity

This depends on how many DMA channels you might be using. Or if you are using the interrupt mode to transmit bursts of data, whether the MCU core can process the interrupts in time, to avoid missing data.

 

2. UART Receiver handling capacity

The baud rate you can use depends on the max baud rate that the UART receiver can support. For instance, if you use an FTDI chip based UART-to-USB adapter for logging UART data on a PC, then you would need to consider the maximum UART baud rate supported by the FTDI chip as well.

 

3. Error budget, Accuracy of Clock Source and Oversampling

  1. For a typical word size of 10 bits, the error budget in terms of accuracy of sampling UART data, is +/- 5%. This error budget is shared between the UART transmitter and receiver. Which means, that assuming equal accuracy on the two sides, the error budget is actually +/-2.5% on either side. In fact, keeping some margin, it might be better to shoot for +/-4% and as such the error budget would then be +/-2% on either side.
  2. There are two sources of error – the accuracy of the clock source, and the accuracy of derived baud rate from the frequency of the clock source (due to integer/fractional division used). For the first, we would look at the specification of the clock source (for example, external crystal or internal oscillator accuracy), while for the second, we would need to estimate the theoretical error (for reference, look at Table 17-1 in the UART chapter of the HRM). The main determinant of error would however usually still be the accuracy of the clock source. As an example, if the only source of error in system were to be the clock source, we would need one with an accuracy of better than +/-2% to work with fixed baud rates in a system where both UART Tx and Rx have the same accuracy.
  3. The error budget is also influenced by the oversampling ratio. Using a higher oversampling ratio is better for improved accuracy (whether you need it or not will depend on the available error budget and the accuracy of your clock source). A simplified equation for determining the (total, receiver + transmitter) error budget for 10 bit words without parity is:

, where ‘S’ is the oversampling ratio. See this academic paper for reference.

For example, when S = 4, the error budget would be ~2.85%. When S = 8, the error budget would be ~4.35%. This oversampling ratio will determine the value of the ‘OSR’ parameter you select. S = 2^(OSR + 2). Higher the OSR you need to set (depending on the error budget in your system, as determined mainly by clock source accuracy), lower the UART baud rate you might be able to use.

 

Note: some of the equations and calculations above might be approximations (for some example UART configurations) and are meant more to provide a feel for the variables involved.

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