How can I estimate the sample rate of the SPORT frame sync input on ADSP-SC5xx/ADSP-215xx processors?

Document created by Mitesh Employee on Nov 28, 2016
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One way to estimate the sample rate of the SPORT frame sync input on ADSP-SC5xx/ADSP-215xx processors is to use one of the peripheral timers in "width capture" mode. The ACI pin of the timer 5 and timer 6 modules are routed internally to DAI0 pin 4 (see screenshot below).

 

 

Thus, if the frame sync signal is routed to DAI0 pin 4, the same can be routed to timer 5/6 input without any external connection. The attached code shows how to use this internal routing to estimate frequency of the frame sync signal generated by SPORT0 and routed to DAI0 pin 4 with the help of timer 5 programmed in width capture mode.

 

The below screenshot shows the expected v/s measured values for different frame sync frequencies. As we can see, the measured value  is  as expected.

 

If the frame sync is not connected on DAI4 pin, then provision must be made on the board to connect the frame sync signal to the timer input pin externally.

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