JESD204 High Speed Analog Design

Document created by scottdell on May 23, 2016Last modified by scottdell on May 27, 2016
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JESD204 high speed analog design is a developing area of high speed electronics.  JESD204 permits the low cost realization of high speed analog to digital conversion systems like never before.  1000 megasample per second conversions are actually possible in a continuous system using JESD204 as the digital interconnect system.  Backend FPGA circuitry interfaced to a JESD204 conversion device makes for an unprecedented conversion speed.

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