FAQ: What are the major features of FFT Accelerator on ADSP-CM41x series

Document created by AkashA Employee on Apr 29, 2016Last modified by AkashA Employee on Apr 29, 2016
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FFT Accelerator on ADSP-CM41x  is 16 bit Fixed point FFT accelerator. It provides an convenient  way to offload signal spectrum analysis from the Core, It  provides the following features :

  • Configurable input size from minimum 32 points to 512 points
  • Built-in optional format converter to handle  different type of data sources or sensors
  • Built in optional comb-filtering to remove periodic noise from the time domain input signal
  • Built in optional windowing on the input data
  • Input data can be either provided either by Memory writes or DMA'ed( Direct Memory Address)  in the memory mapped input buffer (IBUFF)
  • Complex Output Data can be either read from the memory mapped output buffer ( Real WBUFF, Imag WBUFF)
  • Square magnitude of the spectrum is stored in the memory mapped magnitude buffer ( MBUFF)
  • Average spectrum can be compared against the pre-defined values stored in limit buffer (LBUFF), and Limit Error interrupt can be generated
  • Provides different mode to control the start and end of FFT operation, Manual ( Single Processing) , Auto ( Continous Processing) , Trigger mode ( Trigger one short , Trigger Continuous Mode)
  • Multi channel Mode,  which provides up-to 4 Channel data input and provide an average spectrum output
  • Parity Protection for the FFT memory: Every byte in the FFTB memory with one parity bit and every memory read access for parity errors and error interrupt capability
  • Register Lock feature to provide erroneous write on the FFT register


Details of the features are provided in the Hardware Reference Manual Refer to FFT Signal Spectrum Monitor (FFTB) chapter.

Details of the Memory mapped buffer please refer to the  Datasheet.  ADSP-CM411F-412F-413F-416F-417F-418F-419F