I have few questions regarding the HMC1020 RMS RF power detector that we use in
some of our designs:
1. I saw that in the new datasheet of HMC1020 the number of combinations
of the SCI1-4 logic pins was reduced (earlier the combinations went from 0000
up to 1111, but now they are only up to 1100). What is the reason for that ?
2. If I want to use the 1111 combination of SCI1-4 pins (for the longest
integration time) or something closer, for example 1110, what would happen ?
Would I get some unpredictable functionality ?
3. Which SCI1-4 pins logic combination would you recommend us to use for
getting integration time of 10mS (min.) of an 10MHz LTE signal ?
1. So, the reason the change was made was because that the designers at later
stage found out that an SCI setting from 1101 to 1111 caused excessive leakage
currents at high temperatures. This manifests itself as the lower half of the
detection range completely saturating. (ie. You don’t get the specified low end
sensitivity). These “forbidden” states do not damage the part; you just get
this big loss of range.
2. Usage of SCI setting 1111 on HMC1010 and HMC1020 will not do any damage and
the will probably work ok at 25 degC. But at high temp, there will be massive
loss of detection range. So there is a complete family of these RF detectors
HMC1010, HMC1020 and HMC1120. All the three parts can be operated down to
arbitrarily low frequencies but HMC1120 has the most available board averaging
because SCI setting 1111 is permitted.
3. This was already answered on the engineering zone.
The carrier bandwidth of 10 MHz is not a problem. The settings on the four SC
pins control a trade-off between pp output noise and settling time. Most of the
datasheet plots use a setting of 0110. These plots use WiBro and WCDMA signal
sources (the release of this device pre-dates LTE. I would say that the
behavior of the 4-carrier WCDMA signal will be fairly similar to your 10 MHz
LTE carrier (the main difference is that the LTE carrier is about half the bw
of four WCDMA carriers). Because your input signal is FDD, settling time may
not be that important. So you could set the SC settings to the maximum
allowable value of 1100. This will minimize output noise at the expense of