QPlease can you explain the consequence of logic level signals applied to pins 7
& 14 of the ADUM3482.
ASo the CTRL pins of the ADuM3482 controls the default high or low for each side.
CTRL1 controls the default state for side 1 and CTRL controls the default state
for side 2.
The default state is the state that the part/side reverts to when the output
channel doesn’t receive any signals from the respective input channel.
1) CTRL2 is tied HIGH. Side 1 is unpowered. In this case channel 1 & 2 will
output a logic HIGH level for a ADuM3482.
2) CTRL1 is tied LOW. Side 2 is damaged (Exceeded Max VDD, Reverse Polarity,
etc). In this case channel 3 & 4 will output a logic LOW level for a ADuM3482.