ADuC7xxx: Issues when debugging with JTAG interface

Document created by analog-archivist Employee on Feb 23, 2016
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When debugging the ADuC7xxx parts via JTAG, I sometimes encounter problems
where the JTAG interface no longer works. Have got any configuration
recommendations to avoid such problems?

 

The following are a list of some common causes of JTAG debugging problems:

1) When debugging the ADuC7xxx parts, user code should never enable any power
saving mode. The JTAG interface requires the ARM7 core to always remain active.

If by mistake you enabled a power saving mode in your source code, you should
Mass erase the part using the ARMWSD interface (ARM Windows Serial Download
application provided by ADI as part of the evaluation kits.)

2) Similar to item 1, user code should never enable the watchdog timer in
watchdog reset mode. The JTAG interface does not support the watchdog reset
feature, therefore when debugging via JTAG, the watchdog reset should be
disabled.

Again, if by mistake you enabled the watchdog timer in your source code, you
should Mass erase the part using the ARMWSD interface.

3) Incorrect configuration of the debug environment (IDE) for the target
ADuC7xxx part. The user should check that the compiler/linker settings are
correct for the target device, particularly the target flash and SRAM addresses.

If you discover an incorrect setting, mass erase the part via ARMWSD and start
again.

4) Double check that the JTAG programming driver is configured correctly and
for the correct target device.

If you discover an incorrect setting, mass erase the part via ARMWSD and start
again.

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