Programming Specification for ADuC7033

Document created by analog-archivist Employee on Feb 23, 2016Last modified by analog-archivist Employee on Feb 23, 2016
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We design universal ISP programmers and need to develop a new algorithm for one
of our new programmers for ADuC7033. In the datasheet I can see that it is
programmable using the JTAG protocol. Is it possible for you to provide me the
programming specification of this device through this protocol? I ask you this
because the information that I can see from the datasheet are not enough for
our purposes.
If it is necessary we are available to sign an NDA document.

 

The JTAG interface on the ADuC7xxx is an industry standard JTAG port. Appended
is an incomplete application note that may be of help as a starting point.
Another option is to use the on-chip UART based bootloader. Details are
documented here:
http://www.analog.com/static/imported-files/application_notes/AN-724.pdf

The JTAG block is a functional block within the ARM7 core and the Debug Block
is described in detail in the ADM7TDMI Technical Reference Manual:

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0210c/DDI0210B.pdf

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