ADSp-TS201S: FFT difference in simulation and rel Time

Document created by analog-archivist Employee on Feb 23, 2016
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In the simulator, a FFT program need 65983 cycle counters.
But in the EZ-KIT,the
register of CCNT show the cycle counter is 125038.why? which is right.

 

Under simulation, the cache is enabled by default.  To acheive the same
performance when runing codes with hardware, user needs to enable cache at the
very beginning of the codes.  Here is an example:

\Analog Devices\VisualDSP 4.5\TS\Examples\ADSP-TS201 EZ-Kit
Lite\AudioPassThrough C\MainA.c

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