How can I utilize Cache with Async memory connected SRAM?

Document created by analog-archivist Employee on Feb 23, 2016Last modified by analog-archivist Employee on Feb 23, 2016
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How can I utilize Cache with Async memory connected SRAM?

 

SMC interfaced memory and Cache – how design works A memory connected to SMC
can be accessed directly from the system memory space: 0x6000_000. This is the
typical way to access the asynchronous memory. However, accessing these
locations will not utilize cache. In order to use cache, one must access
0x1900_000, the locations otherwise being called as MEMY region.  User only has
to ensure few things for above to work:
1)      Always compile/link the code against MEMY (0x1900_000) locations.
2)      Make sure that M4P_MEMY register is programmed as 0x60000003 (default).
3)      Program/load the compiled code in to 0x6000_000, the system memory
space.
4)      Access 0x1900_0000 directly. Processor will take care of reading from
system space
          internally.

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