QHow can I dynamically turn off and on the instruction and/or data
cache while I am executing out of external memory?
I am running out of async flash memory using instruction cache. But
when I need to erase and reprogram sectors I would like to turn off
the cache completely and return to execution out of the flash so that
I can interract with the part like normal.
After doing my thing with the flash, I would then like to turn the
cache back on, with every cache block in the state that forces
compulsory misses going forward.
Similarly, I would like to do the same thing with DATA cache and the
parts of my flash that I am caching with that part of the cache.
APlease refer to the sections "Instruction Cache Invalidation" and "Data Cache
Invalidation" in the Memory chapter of the "ADSP-BF533 Blackfin Processor
Hardware Reference" Essentially, clearing the IMC bit and the DMC bits in the
IMEM_CONTROL and DMEM_CONTROL registers, respectively, will disable the caches
and invalidate all cache lines which will force the compulsory misses. I would
suggest however to execute this sequence out of L1 memory. Also, follow the
writes to the above registers with SSYNCs rather than CSYNCS as indicated in