# ADG506: Overvoltage on the input

Document created by analog-archivist on Feb 23, 2016
Version 1Show Document

### Q

Problem with given configuration :

During above operating mode, the multiplexer input (protection circuit)
limits the input voltage to » 720mV. The current drawn by the input during
this phase is » 0.27mA.
This operating condition lasts for 300mS. At the end of this period the
supply to the MUX gets established and the input voltage rises to correct
value.

Question  :

If a current of 0.27mA flows into multiplexer input for 300mS before its
supply voltage gets established, what effect will it have on the multiplexer
in terms of :

(a) Any permanent damage to the device?

(b) If there is no permanent damage then how many time can you repeat above
operation?

(c) Would you be able to guarantee that the multiplexer can be operated with
above abnormal condition without degradation problem to above mentioned
channel, other channels?

(d) Does above operating condition causes reliability problem?

### A

Let me start with a few general notes on semiconductor overvoltage (the state
where the voltage at any IO pin exceeds the supply voltage) and the related
issue of ESD protection.

Any semiconductor IC has basic ESD protection diodes which protect the device
from possible ESD hits due to handling and production. The absolute maximum
ratings must be respected at all times including power up and it is the
designer's responsibility to provide external protection circuitry if the input
is likely to exceed the supplies at any time. The ESD protection diodes serve
two purposes, they protect against static discharge during handling and PCB
manufacture and in addition they provide a limited amount of overvoltage
protection to the device.

These ESD diodes can protect the IC from ESD hits up to about 1.5kV and will
act to clamp the voltage at any pin to within approx 0.3V of the supplies. (So
that's the problem solved right? No not quite.) ESD protection diodes can carry
quite high currents but only for a short period of time so they can protect the
IC from large pulses of short duration (the total energy is still quite low).
The maximum DC current which these protection diodes can carry is approx 5mA.
Therefore unless you can guarantee that the current into in pin will me less
then 5mA you need some kind of external protection. External protection could
be as simple as a series resistor to limit the current into a pin. For example
if the maximum overvoltage voltage applied to a pin will be 5V you need to add
a 500Ohm series resistor in each digital line to limit the current to <5mA.
The higher you can make this series resistance the better.

A high series resistance in a digital IO line can cause other problems such as
slowing the rise and fall time of high speed digital signals. If connections
will be accessible by the user, you'll also need to consider ESD protection to
much higher levels than +-1.5kV. You might also want to protect against higher
overvoltages but you don't want to add any more series resistance, so what can
you do? Well, you can do this by adding external Schottky diodes between each
digital IO line and the supply lines. A schottky diode will clamp applied
voltages to within ~0.5V of the supply so the majority of the current will be
diverted via the external diodes (which can carry higher current) and not
through the internal ESD protection diodes. There are other protection
techniques which include use of spark gaps, large capacitors to earth ground,
small choke inductors and more. One the best structures I have seen for
protecting against both overvoltage and ESD is a small series resistor followed
by Schottky diodes to the supplies followed by another small series resistor.

You can see that designing suitable protection circuitry is not a trivial
matter. You need to decide how much protection you need, how much abuse you
expect the card to be subjected to, how much board space and component cost you
can allow, and what test levels you need to meet. Check app notes AN202 and

Now referring to your own specific requirements. To properly analyse, I would
really need to see the circuit schematic prior to the ADG506 and also know the
magnitude of the input voltage.

(a) Any permanent damage to the device?
If you say that under the fault condition that the input is clamped to >720mV
then the ESD protection diodes have started to switch on and are acting to
clamp the input. A current into the pin of 270microamps will not permanently
damage the part. When the ESD protection diode is forward biased, there is
effectively a short from the input pin to the supply, I therefore assume that
you have some circuitry prior to the MUX which is limiting the current. If you
can guarantee that the turn on conditions will not change from the those you
describe then the part will not be damaged.

(b) If there is no permanent damage then how many time can you repeat above
operation?
there will be no permanent damage to the device and there will be no cumulative
damage.

(c) Would you be able to guarantee that the multiplexer can be operated with
above abnormal condition without degradation problem to above mentioned
channel, other channels?
Provided the part is operated within the absolute maximum ratings at all times,
we can guarantee that the part will not suffer damage. However a proper
analysis of the input circuitry would be prudent to look for any other
possibilities due to ESD, incorrect power sequencing, exceeding the power
supply maximum ratings etc. It is preferable that the input protection
circuitry is deliberately designed into the system, rather than simply measure
the voltage and current in one system and presume that all other systems will
operate the same way.

(d) Does above operating condition causes reliability problem?
Again, provided the absolute maximum ratings are always respected, the
condition you describe will not adversely affect the long term reliability of
the part.

If you cannot guarantee the current into MUX is limited under all conditions,
then you may consider using a fault protected MUX such as the ADG508F, not we
only have 8 channel fault protected muxes available therefore two ICs would be