ADG1204: What is the optimal impedance level for source and load to apply?

Document created by analog-archivist Employee on Feb 23, 2016
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What is the optimal impedance level for source and load to apply?

 

The ADG1204 is optimised for low capacitance and charge injection and therefore
has a relatively high ON-resistance - with your 13 V total supply this is
typically 250-300 Ω. But the architecture of all CMOS analog
switches and multiplexers, not simply this one, causes their ON-resistance to
vary as the channel voltage moves from close to one supply to close to the
other. This is illustrated in TPC Figures 4-8 on the Data Sheet.
It is therefore advisable to use a load resistance which is much larger than
the switch ON-resistance. Just how much larger depends on how much gain loss
and distortion your system can tolerate. It is quite common for
people to use an op-amp configured as a unity gain buffer to present a high
impedance to the CMOS switch and a low impedance to their ultimate load.
You may drive the input of the switch from whatever impedance you wish,but this
source impedance will add to the switch impedance.

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