ADF4001: phase difference between REF and RF output-2

Document created by analog-archivist Employee on Feb 23, 2016Last modified by analog-archivist Employee on Aug 10, 2016
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If the output phase is different with the REF input phase, does it mean
something wrong with the circuit?
If the PLL is locked, the N*Fpfd (VCO output) should have the same phase with
Fpfd*R (REF input) since the two inputs at PHASE DETECTOR should have the same
frequency and the same phase.
The R counter and N counter can not influence the phase. Is that correct?
If so, I should check the loop filter and change a VCO, is there any other
suggestions for solving this issue.


In lock status, if the voltage control side has a small impedance to the
ground, there should be extra current from PLL pump charge to keep the loop
stable. This extra current should be generated from phase difference. The
result is in lock status, REF input and feedback input should keep a fixed
phase difference, the smaller the impedance ,the larger the phase difference.

There is another reason that may cause the problem, when using
capacitor(i.e.Tantalum Capacitor) in the filter loop, there is small DC
resistor or when using OP AMP to configurate an active filter, the input side
has a small resistor to the ground.
You could use the voltage of voltage control side and impedence of VCO to
ground to calculate leakage current, then you know the phase difference of
phase detector, the formular is as in figure2.
This method could be used to troubleshoot the problem and by changing frequency
and ICP to reduce phase difference.
Phase delay caused by R and N counter can be ignored in most cases.