Is ADE7912's Surge Isolation Voltage test performed using an extra Y-capacitor?

Document created by analog-archivist Employee on Feb 23, 2016
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Is the provided data for surge isolation voltage on page 8 of datasheet (rev.
PrJ) meant to be with or without an extra Y capacitor? Is there an extra
Y-capacitor needed for burst/surge performance, which is not shown any of the
circuit diagrams?

 

Yes, the ADE7912 has a dielectric insulation that can sustain 5kV rms for 1
minute. This is the dielectric voltage withstand test, in which the chip is
tested to withstand without breakdown for 60s a potential equal to the 5kV
between the input and output terminals. So no capacitor is involved for this
test.
In addition, the chip is also tested to the Surge isolation voltage test (10kV,
1.2us rise time, 50us 50% fall time). This test involves a capacitor because it
is the capacitor that produces the discharge. We do not provide these diagrams
as they are provided in the standards according to which we will be certifying
the ADE7912. These certifications are mentioned in the datasheet (table 3, page
7, rev PrJ).

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