AD9954: RAM continuous recirculate mode, start phase information

Document created by analog-archivist Employee on Feb 23, 2016
Version 1Show Document
  • View in full screen mode

In the RAM continuous recirculate mode, what is the phase information at the
very beginning of each sweep cycle? Does the phase reset to 0 at the beginning
of each sweep cycle?

 

The RAM can be configured to add a phase offset to the signal path.  If so,
the  phase offset value in the RAM is added to the output phase of the phase
accumulator. So, unless the phase accumulator is reset per each sweep, the
initial phase would not be constant for each sweep. You could use the clear
phase accumulator bits (CLRACC1 or CLRACC2) to clear the phase accumulator, if
desired.

Attachments

    Outcomes