Bit 2 in address 0x0200 in I/O register - HSTL driver

Document created by analog-archivist Employee on Feb 23, 2016
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Need an explanation on a bit in the I/O register map that is not documented

It is bit 2 in the I/O register map address 0x0200.

In my experience this bit must be set high in order for the HSTL to function
correctly. I can see that it is set high by default but once I started
programing I set it low, only enabling the bit locations I found in the data
sheet. This gave me problems and it was not until I set bet to to high by
chance that it started working.

Do you have an explanation on what this bit does?

 

Bit 2 in address 0x0200 of the I/O register map is one of the bits that
determines the output driver mode. This bit needs to be set to 1, its default
value, in order to have AD9912's HSTL driver operate as expected.

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