QFirst, in the block diagram on the first page of the datasheet, there is a VCM
output pin. However we did not find a corresponding pin in the pin function
descriptions. Is this pin same as RREF pin?
Second, if I place the CLK SYN into standby mode, can I use an external clock
for the ADC sampling clock or not. What does the clock buffer mentioned in the
And if I would like to use an external LO instead of the internal one. Need I
place the LO SYN into standby mode?
AAttached diagram is incorrect since VCM pin does not exist. This pin should
been called CXIF and CXVL and originate from the mixer core.
Yes, you can use an external clock source for the CLKP input that is AC
coupled. The CLK SYN and OSC will need to be disabled. If single-ended CLK
input, one should drive CLKP input via 10 nF cap with CLKN tied to AGND with 10