AD9856: Pin connection

Document created by analog-archivist Employee on Feb 23, 2016
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I am investigating problems on a PCB containing an AD9856. The SDIO pin
is driven from a 244 buffer however there appears to be contention on
this pin.

I am not sure whether some pins on the device are connected correctly.
The PLL SUPPLY pin is connected to PLL GND as we are not using the PLL.
Is this OK?

Also the SYNC I/O pin is connected to ground via a 10K resistor. Should
we be using this pin to ensure integrity of the serial control link?

 

Even if you are not using the Reference clock you should still connect Vpll to
3V and disable the reference clock multiplier in the register 01H.

The serial interface of the AD9856 is synchronous and it is essential that the
part sees exactly the right number of clock edges  during each communications
cycle. Reading or writing one too many or one too few bytes during a
communications cycle will cause synchronisation of the interface to be lost.
Similarly any spurious glitches on the SCLK line could be interpreted as clock
edge and will throw the serial port out of sync.

If multiple sources are able to drive the SCLK pin or if poor grounding and
board layout allow coupling of some other signal onto the SCLK line, the
interface could be getting out of sync regularly. The interface can be reset to
it's default state of expecting an instruction byte by proving a high going
pulse on the SYNC IO pin. Controlling the SYNC IO pin is a  useful way out when
synchronisation is lost but you'll need to look carefully at your board and
determine what is causing the interface to get lost in the first place.

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