AD9832: Driving from LVCMOS

Document created by analog-archivist Employee on Feb 23, 2016
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I have a problem concerning AD9732 (analog Device DAC )
Its Data comes from FPGA  (xilinx -virtex2 ) which works in LVCMOS Technology ,
It means VOHmin=2.9 Volt and VOLmax 0.4 V. Can This DATA will be well
implemented in the AD9732 which accepts VILmax=1.6V VIHmin=2.4v ? or will be
some problems concern to the Fact that this data is not in PECL Single Ended
technology.

 

The switching threshold of the AD9832 digital inputs is 2V. To guarantee
operation over the full temperature range we guard band this threshold voltage
by 0.4V in specifying the min logic high voltage = 2.4V and the max logic low
=1.6V.

The logic levels from the FPGA should be able to drive the AD9832 directly
provided you meet the set up and hold times on the datasheet.

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