QI am using the AD9780 along with an FMC board. The FMC is used in a system
where the clock may be delayed for up to 1us. Are any of the DAC
functionalities affected or modified due to this clock delay?
If yes, is there a minimum time to recover to normal operation?
Are the internal configurations modified due to the clock stopping?
AWhen you stop the clock on the AD9780 the clock receiver will chatter. The DAC
output sends out high frequency glitches with amplitudes of +/-2v. I believe
the part will recover in about 10 DAC clock cycles to the normal performance,
since the latency is 7 clock cycles. As long as the
glitches don’t bother you, it is acceptable to stop the clock for 1us. If you
have a Power
Amplifier following the DAC, these glitches may not be safe to drive into the
Power Amplifier, maybe the outputs should be powered down prior to stopping the
unless this is at initialization of the part.