AD-FMCOMMS1 direct ADC access

Document created by analog-archivist Employee on Feb 23, 2016
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The problem can be found on page 3 of 13 in the schematics of AD-FMCOMMS1 :
http://wiki.analog.com/_media/resources/fpga/xilinx/fmc/fmcomms1-revbschematic.p
df

In default configuration (as the board is shipped) , the 0.9V CM voltage
required by the AD9643 ADC is divided by R69/R70 and R67/R66 from the output of
AD8366.
When switching J1 and J3 to directly access the ADC , the bias voltage should
be provided by R76/R116 divider. For no load case, this divider delivers the
required 1.6V. But when shorting the jumper (J1 Com-A, J3 Com-B) , the divider
will be heavily loaded (2 * 100 Ohm parallel to R116) and the voltage certainly
breaks down.
(All these under the assumption that GND connection between R70 and R66 is
"real" and it doesn’t represent a "virtual" ground connection.

If these facts are true than we need a solution proposal since we want to
operate the board as "bare ADC" our tests.

 

We have made some changes in the BOM (Rev B) 4 months ago (after mid 2013) and
your measurement confirms that your board has been manufactured more than 4
months ago. Please have a look into the attached schematics - you should use
the modified resistor values for R66, R70, R76 and R116.

R66 : 57.6 Ohm -> 82.5 Ohm
R70 : 57.6 Ohm -> 82.5 Ohm
R76 : 6.8 KOhm -> 165 Ohms
R116 : simly desolder

The corresponding documentation can be found here :
http://wiki.analog.com/resources/eval/user-guides/ad-fmcomms1-ebz/hardware/bom_i
mprovements

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