QI have two questions about "INTERLEAVING TWO AD9481s ". The datasheet shows the
description as below figure shown:
1. The phase offset between two ADCs' Clock should be 180 degree, isn't it?
2. How we deal with the two ADCs' DS Signal? The two ADCs' DS Signal shouldn't
be a same signal, isn't it?
A1) Yes the phases between the two ADCs are 180° out of phase; however, that is
not sufficient in most cases. There needs to be a fine tuned tweaking of the
two clocks to eliminate timing spurs. See the attached article for more
2) The DS is more for setting the ADCs to hand off data to a receiver with the
appropriate timing. It does not affect the sampling time of the converter.