AD9054A single ended drive

Document created by analog-archivist Employee on Feb 23, 2016
Version 1Show Document
  • View in full screen mode

By varying the reference voltage I must be able to digitise to full scale a
signal whose amplitude varies from 0.7V pk-pk to 1.4V pk-pk. The drive is
single ended with Ain(-) connected to the internal reference (2.5V). The
voltage applied to VRef In (pin 34) will vary between 1.8V and 3.5V. The signal
applied to Ain(+) will be within the compliance range.

The data sheet suggests that the external reference can be 2.5V +/- 0.25V. What
happens beyond this? I can accept a performance degradation but not coding
errors. Clock frequency is either 50MHz or 100MHz.

 

The AD9054A cannot handle this type of variation on the reference. Given the
wide range, it is better to vary the signal prior to the AD9054A rather than
adjust its gain.
Specifically what will happen is:

The reference will work down to about 1.7V before the current sources collapse
(although we do not guarantee this). The only issue with decreasing the
reference is that DNL & INL will increase proportionately with the decrease in
full scale range. On the high side, the part runs out of head room (current
sources collapse, the buffer amplifier will become non-linear, etc.) I don't
remember exactly at what voltage this occurs (maybe 3V), but it is also highly
dependent on the power supply voltage."

Comments from Gary Hendrickson (previous Apps Engineer):
"I expect you will have a problem if you try to use the 9054 as customer
intends. I do not think the reference has the compliance range the customer
wants. Varying the reference changes the lsb size and fs range, reducing the
lsb size will increase the likelihood of coding errors. "

From the comments above, it's not going to be possible to operate the AD9054A
as Snell & Willcox would like. but let's back up here. They want to digitise an
input signal with amplitude between  0.7Vpkpk and 1.4Vpkpk to 8bit accuracy
using a 50MHZ or 100MHz clock. The 1.4Vpkpk input is beyond th input range of
most high speed ADCs and playing around with the reference is a messy way to do
input signal conditioning.

The options I can see are:
A programmable (switchable) attenuator in front of the AD9054A to flip between
the two input ranges
Use an Automatic gain control circuit such as the AD604.
Use a 10bit ADC with a 1V input range. AD9050/1 will go up to 60Msps and is
reasonably priced. For 100Msps operation, the AD9070/1 is expensive at
80dollar, the AD9410 will do 200Msps for 60dollar, the AD90214 will go to
105Msps

Attachments

    Outcomes