AD8368 EVM and capacitor value calculation

Document created by analog-archivist Employee on Feb 23, 2016
Version 1Show Document
  • View in full screen mode

I have some questions on AD8368. 1, in figure 39, why the Power in value is
less than -20dbm, the EVM will be getting worse? 2, Table 6, how to decide the
value of C20,C2 and C4? Since they are all DECL capacitors, how to calculate
each capacitor value? 3, How to calculate the value of C23?


To your questions on the AD8368: 1, Among other things, EVM is a function of
Signal to Noise Ratio and will degrade at low input powers.  One way to look at
it, is SNR = Pr/(NoB), where Pr is the received power of the system, No is the
noise causing the error in EVM and B is the bandwidth of the signal.  Assuming
noise always stays the same, if the received power decreases, the SNR decrease
and the noise, No , seemingly contributes more to the EVM, since EVM is
basically the measure of how much the original vector is in error. 2, Here is
an un-published revision of Table 5 in the datasheet: 380MHz C20=56pF C2=56pF
C4=33pF; 240MHz C20=150pF C2=150pF C4=68pF; 140MHz C20=470pF C2=5.6pF C4=68pF;
70MHz C20=1nF C2=5.6pF C4=1nF. 2, To set C23, you need to know what your high
pass corner frequency needs to be on the output offset control loop.  An
equation on page 12 in the datasheet will correlate frequency to CHPFL (C23)
value. C23 = 10nF is a good all around cap value, and should serve you just
fine in most situations. From my experiments on the AD8368, not getting these
capacitor values exactly correct should change the performance all that much. 
Start with 10 nF on C23 and whatever frequency you’re operating at, pick the
appropriate values for C20, C2 and C4.