polarity/potential to connect to this exposed pad

Document created by analog-archivist Employee on Feb 23, 2016
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I'm designing with the AD8139. According to the datasheet the chosen SOIC
package of the AD8139 has an exposed pad for cooling purposes on the package
bottom. What is the right polarity/potential to connect to this exposed pad to?
Is it permissible to connect it to GND? Are there any restrictions to other
voltages (VCC for example)?

 

The exposed pad in the AD8139 SO-8 package is floating, so it can be attached
to any plane.  The data sheet indicates this:

The 8Bit SOIC and the 8 bit LFCSP have an exposed pad at the bottom of the
package. to achive the specified thermal resistance, the exposed paddle must be
soldered to the one of the PCB planes. the exposed paddle mounting must contain
several thermal vias within it to ensure the low thermal path to the plane.
  

Some parts have a downbond to the exposed paddle, and in these cases the
exposed paddle must be connected to a specific potential. 

With the AD8139, most customers connect it to the ground plane.

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