AD7859: Functionality after power-up

Document created by analog-archivist Employee on Feb 23, 2016
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In some cases (about 1%) device doesn't function properly after power-up.
external sleep / calibration doesn't help. there seem to be 2 error modes - 1.
getting very high readings from all channels regardless of the analog inputs.
2. strange readings, there's some correlation to analog inputs (i.e ch1 affects
ch3, etc..) but readings are wrong. do u have any ideas of what the problem
might be? are there any "frequently done errors" ? could something happen
during FPGA config were DIOs are unstable that put the device in such state? t

 

Check on power up that the power (Avdd and Dvdd) is applied and fully settled
before signals at REF IN ,AIN, or the logic input pins are applied in order to
avoid excessive current.

Here are some ap-notes relating to the AD7859:

1) You cannot change channels and initiate a conversion on the new channel in
the same write cycle.

If you use the CONVST bit to initiate conversions, you need 1 write cycle to
set the channel select bits and a second write to the control register to
initiate a conversion on the newly selected channel.

(If you do change the channel select bits and set the CONVST bit with the same
write to the control register, the AD7859 will convert on the previously
selected channel and only then change the input channel)

2)Finally, a datasheet omission that was noticed by another customer :

Q) When using the AD7859 in byte-transfer mode, i.e. W/_B pin tied low, and
using DB8/HBEN  as low/high byte selecting pin, what is recommended for the
unused  DB9-DB15 pins ?

Should they be left open, tied to GND or to Vcc ?

A) These output pins should be tied to DVDD via 100 kΩ resistors when the
AD7854/AD7854L is being interfaced to an 8-bit data bus.

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