AD7799_data reading timing

Document created by analog-archivist Employee on Feb 23, 2016
Version 1Show Document
  • View in full screen mode

I have a question about the timing of AD7799.
The Datasheet  says "Ready Bit. Cleared when data is written to the data
register. Set after the data register is read or after a period
of time before the data register is updated with a new conversion result to
indicate to the user not to read
the conversion data. It is also set when the part is placed in power-down mode.
The end of a conversion is
indicated by the DOUT/RDY pin. This pin can be used as an alternative to the
status register for monitoring
the ADC for conversion data." So I want to know the exactly how much time is
that period?
And if I check the /RDY pin, it will goes high after a period of time before
the data register is updated with a new conversion result, it is the same as
/RDY bit,
Then how long is this period?
In other word, it will tell me how much time left at least for me to read the
data.

 

The DRDY pin goes low when a new conversion is available. If the customer reads
the conversion, DRDY will go high as soon as the data register is read. The
customer can read the data register even when DRDY is high as it will not be
updated until the next conversion is available.

If the customer does not read the conversion, then DRDY stays low indicating
that a valid conversion is available. However, when the next conversion is
available, DRDY goes high when the data register is being updated. DRDY goes
high for 0.8 ms approximately. The customer should not read the data register
during this period as it will not contain a valid conversion (it will be in a
transient state).

So, in summary, the customer has a time of 1/Fadc - 0.8 ms typically to read
the data register after the DRDY high to low transition occurs (Fadc = update
rate selected).

Attachments

    Outcomes