QI wish to multiplex 8 channels to 16 channels and require advise on the best
time to change over the analog switch during the AD7763 cycle as it is unclear
on the current datasheet when the AD7763 starts processing the analog. ie at
the fall of Drdy or fall of FSO.
AThe AD7763 is a sigma delta converter and the input is sampling continuously.
In order to multiplex the input, you need to reset the digital filter, so that
results from the previous channel do not interfere with results from the new
channel. Given that the filter delay is many 10s or hundreds of us, a change of
channel between each conversion and the next one dramatically reduces the
sample rate that can be obtained; the overhead each time the channel is changed
is very significant.
The AD7763 starts processing the signal as soon as the SYNC\ signal is
deasserted. The first valid data is indicated by the DVALID status bit i.e.
after the digital filter has settled. Once this is the case you can read one or
mode valid results and then change the channel on the mux, toggle the SYNC\ pin
and start again.
DRDY is asserted at the output word rate, but the first output words after a
channel change are not valid.
FSO is just a frame sync for the output data. It doesn't indicate anything
about the conversion status.