AD7730: ESD protection

Document created by analog-archivist Employee on Feb 23, 2016
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We are currently using AD7730 in our weighing indicators.
The load cell input is connected to the AD7730 inputs with an EMI filter
(muRata DSS710), a 330 Ohm serie resistor and a 470 pF cap to GND.
Now we are in the process of re-engineering some units andI would like to
improve the ESD/EFT immunity of the load cell input.
Can you suggest a good solution to protect the AD7730 input against EMI and
ESD/EFT while maintaining the nominal performances?


Most ICs are protected against ESD hits of between 1kV and 3kV based on the
human body model.
From the point of view of the end manufacturer or OEM, equipment must pass the
CE-mark which means meeting IEC1000-4-2 for ESD protection,  and IEC1000-4-4
for Electrical Fast Transient (EFT) Immunity.
These standards apply only to inputs and outputs which are directly accessible
by the end user. The IEC ESD protection standard normally requires equipment to
pass level 3 (8kV air discharge, 6kV contact discharge). It is the
responsibility of the end manufacturer to ensure that their equipment passes
these tests.
We don't have any standard recommendation on how to protect circuits from ESD
damage as most manufacturers develop their own standard methods. Basically you
have to ensure that the energy from an electrostatic discharge is dissipated
long before it ever reaches the sensitive electronics. There are a number of
ways of doing this. Some methods include,  a diode clamping circuit, tranzorbs,
sparkgaps on the PCB, capacitors to earth ground, a current limiting resistor,
and combinations of the above.

The final chapter in all our seminar books is dedicated to hardware design
techniques and deals with such issues as grounding, decoupling, parasitic
thermocouples and good PCB design.

Refer to chapter 9 of data conversion handbook: