AD7684: Stuck bits

Document created by analog-archivist Employee on Feb 23, 2016
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result b0 and b3 are always "0"

I have 2 cards with that bug.

Have you an idea or solution !?

 

The majority of "peculiar problems" that we see with SAR ADCs (e.g. "stuck"
bits among the LSBs, non-linearity) are due to insufficient decoupling
capacitors on the reference and the power supplies or poor grounding practice.
High resolution SAR converters like the AD7684 are particularly sensitive to
this.
Please ensure all recommendations of page 25 of the AD7684 Rev0 datasheet are
complied with.
An example schematic of a good working, well decoupled PCB is "Technical
Documentation for the EVAL-AD768XCB/AD769XCB/AD794XCB".

Stuck lower  bits are usually indicative of incorrect voltage reference
decoupling.
The ADC REF input needs a low ESR decoupling cap (we recommend a 10uF in the
datasheet, Figure 22) placed right at the REF pin, as well as a 100nF right up
against the pins of the ADC.
If you lower the input to something small, the problem probably goes away.

A little background as to why this is:
During conversion, the internal comparator pulls current from the REF pin while
performing the successive approximation.
The larger the input on the T/H (track/hold), the more current is pulled from
REF and without sufficient decoupling, the REF bounces.

Others possible causes could be incorrect decoupling on any of the supplies.

We strongly recommend a multilayer PCB with separate analog and digital GND
planes connected together under the ADC.

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